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多芯片组件(MCM)的可测性设计

Design for Testability of Multi Chip Module(MCM)
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摘要 为克服在线测试技术测试MCM时不能达到满意的故障覆盖率的困难,采用可测性技术对MCM进行设计.根据MCM的特点和测试要求,提出了在JTAG标准基础上扩展指令寄存器,添加专门的用户指令,融合扫描通路法、内建自测试法等可测性方法,分层次地对MCM进行全面测试.建立模型进行验证的结果表明:该方法能有效地测试MCM,缩短了测试时间,故障覆盖率达到95%以上. To overcome the difficulties in achieving satisfactory fault coverage when testing Multi Chip Module (MCM), MCM was designed by means of testability technology using on-line test technique. According to the characteristics of MCM and its testing requirements, a testing solution based on extending JTAG through adding instruction registers and user instructions was proposed. It embraced some techniques of designing for testability (DFT), such as Scan-based Test and Build-in Self Test (BIST). Tests results showed that this method could test MCM effectively at a shorter time with a fault coverage of more than 95 %.
出处 《湖南大学学报(自然科学版)》 EI CAS CSCD 北大核心 2005年第4期62-66,共5页 Journal of Hunan University:Natural Sciences
基金 湖南省自然科学基金资助项目(01JJY2113)
关键词 多芯片组件 JTAG 可测性设计 MCM 指令寄存器 Multi Chip Module (MCM) Joint Test Action Group (JTAG) Design for Testability (DFT)
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