摘要
本文提出了多链扫描可测性设计中扫描链的构造方法．根据电路的规模、输人／输出管脚数及测试时间的要求确定扫描链个数，引人临界时间的概念，采用动态编程的方法确定每条链中的扫描触发器．采用该方法，计算速度比传统方法显著提高，同时节省了存储空间．
The methodology of constructing scan chains in a design with multiple scan chains is proposed in this paper. Based on the circuit scale,the number of I/O pins available and the test time required,the number of scan chains is decided. Critical time is introduced,and dynamic programming method is used to locate the flip-flops of every scan chain. Using this algorithm,computing velocity is greatly improved and space is saved.
出处
《电子学报》
EI
CAS
CSCD
北大核心
1997年第2期11-15,共5页
Acta Electronica Sinica
关键词
VLSI
多链扫描
可测性设计
扫描链
Multiple scan,Design for testability,Dynamic programming,Scan chains
