摘要
随着集成电路的规模不断增大,集成电路的可测性设计正变得越来越重要。综述了可测性设计方案扫描通路法、内建自测试法和边界扫描法,并分析比较了这几种设计方案各自的特点及应用策略。
With the increase of the scale of integrated circuits,design for testability of IC is becoming more and more important. We summarize the scan path solution, the built - in self test solution and the boundary scan solution of design for testability, analyse and compare the character and application strategy of these solutions.
出处
《电子工艺技术》
2005年第5期254-258,263,共6页
Electronics Process Technology
关键词
集成电路
可测性设计
内建自测试
边界扫描
Integrated circuit
Design for testability
Built - in self test
Boundary scan
