期刊文献+

一种0.8V 2.4μA CMOS全差分放大器 被引量:3

A 0.8V, 2.4μA CMOS fully differential operational amplifier
在线阅读 下载PDF
导出
摘要 基于0.25μm标准CMOS工艺,采用0.8V开关电容共模反馈电路技术和PMOS衬底驱动技术提出了一种新型0.8V 2.4μA全差分放大器。在0.8V单电源电压下,全差分放大器的直流开环增益为63.8dB,相位裕度为60度,单位增益带宽为7.4MHz,输出电压范围为18~791mV,其中新型模拟开关的输入/输出电压范围为0~800mV,整个放大器的电源电流为2.4μA,版图面积为410×360μm2。 Based on the 0.25μm standard CMOS technology, a novel 0.8V 2.4μA fully differential operational amplifier is implemented in this paper, along with novel quasi floating gate switch capacitor CMFB circuits. With a 0.8V single power supply, the DC open-loop gain of the amplifier is 69.5dB, the phase margin is 63° and the unit gain band width is 715kHz and the input output voltage range is 18-791mV. The power dissipation of the amplifier is 2.4μA. The current active size of the amplifier layout is about 410×360μm^2.
出处 《电路与系统学报》 CSCD 北大核心 2009年第4期66-69,共4页 Journal of Circuits and Systems
基金 国家自然科学基金资助项目(60725415 60676009) 国家863计划资助项目(2009AA01Z258 2009AA01Z260) 西安AM创新基金资助项目(XA-AM-200814)
关键词 低压 低功耗 PMOS衬底驱动 全差分放大器 low voltage low power PMOS bulk-driver fully differential operational amplifier
  • 相关文献

参考文献9

  • 1Shouli Yan, Edgar Sanchez-Sinencio. Low Voltage Analog Circuit Design Techniques:A Tutorial [J]. IEICE Trans. Analog Integrated Circuits and Systems, 2000, E00-A(2): 1-17.
  • 2Jaime Ramirez-Angulo, Carlos A. Urquidi. A New Family of Very Low-Voltage Analog Circuits Based on Quasi-Floating-Gate Transistors[J]. IEEE Trans. on Circuits and Systems-II: Analog and Digital Processing, 2003, 50(5): 214-219.
  • 3Paul Hasler, Bradley A. Minch and Chris Diorio. An Autozeroing Floating-Gate Amplifier [J]. IEEE Trans. on Circuits and Systems-If: Analog and Digital Processing, 2001, 48(1): 74-81.
  • 4John Hyde, Todd Humes, Chris Diorio. A 300-MS/s 14-bit Digital-to-Analog Converter in Logic CMOS [J]. IEEE Journal of Solid-State Circuits, 2003, 38(5): 734-739.
  • 5S S Rajput, S S Jamuar. Low Voltage Analog Circuit Design Techniques [J]. IEEE Circuits and Systems Magazine, 2002, 2(1): 24-42.
  • 6尹韬,朱樟明,杨银堂,郭磊.衬底驱动MOSFET特性分析及超低压运算放大器设计[J].Journal of Semiconductors,2005,26(1):158-162. 被引量:14
  • 7Stocksatd T, Yoshizawa H. A 0.9V 0.5-gA Rail-to-Rail CMOS Operational Amplifier [J]. IEEE Journal of Solid-State Circuits, 2002, 37(3): 286-292.
  • 8Chatterjee S, Tsividis Y. A 0.5-V Bulk-input Fully Differential Operational Transconductance Aplifier [A]. ESSCIRC 2004 [C]. 2004-09. 147-150.
  • 9Haga Y, Zare-Hoseini H. Design of a 0.8V Fully Differential CMOS OTA Using the Bulk-driven Technique [A]. IEEE Int. Sym. Circuits and Systems 2005 [C]. 2005-05. 220-223.

二级参考文献7

  • 1Blalock B J,Allen P E.Designing 1-V op amps using standard digital CMOS technology.IEEE Trans Circuits and System Ⅱ:Analog and Digital Signal Processing,1998,45(7):769.?A?A?A
  • 2Lasanen K,Ruotsalainen E R,Kostamovaara J.A 1-V 5μW CMOS-opamp with bulk-driven input transistors.Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems,2000,3:1038.
  • 3Rajput S S,Jamuar S S.Low voltage analog circuit design techniques.IEEE Circuits and Systems Magazine,2002,2(1):24.
  • 4Blalock B J,Allen O E.Low-voltage,bulk-driven MOSFET current mirror for CMOS technology.IEEE International Symposium on Circuits and Systems,1995,3:1972.
  • 5Allen P E,Blalock B J,Rincon G A.A 1V CMOS opamp using bulk-driven MOSFETs.Digest of Technicl Paper-IEEE International Solid-State Circuit Conference,1995,38:192.
  • 6Yan Shouli,Edgar Sanchez-Sinencio.Low voltage analog circuit techniques:a tutorial.IEICE Trans Fundamentals of Elecronics,Communications and Computer Sciences,2000,E83-A(2):179.
  • 7林越,徐栋麟,任俊彦,许俊.基于共模电平偏移电路新型CMOS低电压满幅度运放设计[J].Journal of Semiconductors,2002,23(5):529-534. 被引量:9

共引文献13

同被引文献13

  • 1Snoeij, M.F. Theuwissen, A.J.P. Makinwa, K.A.A. Huijsing, J.H. M ultiple-Ramp Column-Parallel ADC Architectures for CMOS Im age Sensors ,Solid-State Circuits, IEEE Journal,2007.
  • 2Hashemi,S. Shoaei,O., A 0.9V 10-bit 100 MS/s switched-RC pip dined ADC without using a front-end S/H in 90nm CMOS Circu its and Systems, IEEE International Symposium ,2008.
  • 3Fayomi, CJ.B. Roberts, G.W. Sawan, M. Comput. Sci. Dept., Univ. du Quebec, Montreal, Que., Canada Low-voltage CMOS analog b ootstrapped switch for sample-and-hold circuit: design and chip ch aracterization Circuits and Systems, IEEE International Symposium, 2005.
  • 4Lei WangJunyan Ren Wenjing Yin Tingqian Chen Jun Xu ,A.SIC & Syst., Fudan Univ., Shanghai A High-Speed High-Resolution Low-Distortion CMOS Bootstrap- ped Switch Circuits and Systems, IEEE International Symposium,2007.
  • 5Haga Y,Zare-Hoseini H.Design ofa 0.8V Fully Differential CMOS OTA Using the Bulk-driven Technique[A].IEEE Int.Sym.Circuits and Systems 2005[C]. 2005-05. 220-223.
  • 6LU(I)S H C ,An Ultra-Low-Voltage Ultra-Low-Power CMOS Miller OTA with Rail- to-Rail Input_Output Swing, IEEE Transa ctions on Circuits and Systems,2007 (10).
  • 7M ENDIS S K. CM OS active pixel image sensors for high- Ly integrated imaging system [ J ]. IEEE Journal of Solid State Circuits, 1997,32 ( 2 ) : 187-197.
  • 8SNOEI J,THEUWISSEN M F, MAKINWA A J P, et al. Multiple-Ramp Column-Parallel ADC Architectures for CMOS Image Sensors, Solid-State Circuits [ J ]. IEEE Journal,2007,42(12) :2968-2977.
  • 9LIMOTYRAKIS S, NAM K Y, WOOLEY B A. Analysis and Simulation of Distortion in Folding and InterpolatingA/D Converters [ J ]. Analog and Digital Signal Process- ing. IEEE Transactionson ,2002,49 (03) : 161-169.
  • 10HAGA Y, ZARE H H, BERKOVI L, et al. Design of a 0. 8V Fully Differential CMOS OTA Using the Bulk-driv- en Technique [ C ] IEEE Int. Sym. Circuits and Systems 2005. London: Dept. of Electron syst. Westminster Univ, 2005 : 220-223.

引证文献3

二级引证文献5

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部