摘要
随着存储器技术飞速发展,双倍速率同步动态随机存储器(DDR)工作电压越来越低,为了满足DDR供电需求,设计了一款兼备拉灌电流能力的线性稳压器(LDO),可兼容DDR1~DDR4电源系统供电以及其他电源系统需求。此芯片利用双电源电压供电的特点,降低静态功耗,电源电压输入范围为2.5V到3.3V,线性稳压器功率电压根据DDR1~DDR4供电要求为1.2V到2.5V,设计上采用双环路稳压器实现拉灌电流,输出电压由外部应用配置可调,采用低阈值NMOS功率管推挽输出级,实现低至0.6V输出电压,增加GM放大器,支持快速瞬态响应。采用0.35umBCD工艺设计,在不同DDR供电条件下对稳压器进行仿真,输出能够跟随输入,空载时静态电流约为440uA~700uA,并选取DDR4供电条件进行瞬态响应及稳定性仿直,当负载电流从0A到3A跳变时,输出电压波动约为50mV,结果表明该电路满足DDR1~DDR4应用。
With the rapid development of memory technology,the operating voltage of double data rate synchronous dynamic random memory(DDR)is getting lower and lower.In order to meet the power supply requirements of DDR,a linear regulator with both source and sink current capabilities has been designed,which is compatible with DDR1~DDR4 power supply systems and other power supply system requirements.This chip utilizes the characteristics of dual power supply voltage to reduce static power consumption.The input voltage range of the power supply is 2.5V to 3.3V,and the LDO power supply voltage is adjustable from 1.2V to 2.5V according to the power supply requirements of DDR1~DDR4.This design uses a dual loop regulator to achieve source and sink currents,and the output voltage is adjustable externally by the application.A low-threshold NMOS push-pull output stage is used to achieve an output voltage of 0.6V,and a GM amplifier is added to support fast transient response.The chip was designed using a 0.35um BCD process,the regulator was simulated under different DDR power supply conditions.The output could follow the input.The static current at no load is approximately 440uA to 700uA.The transient response and stability were simulated under the DDR4 power supply condition.When the load current jumped from 0A to 3A,the output voltage fluctuation is about 50mV.The results show that the circuit meets the application requirements of DDR1 to DDR4.
作者
张丹
单闯
段浩
ZHANG Dan;SHANG Chuang;DUAN Hao(The 47th Research Institute of China Electronics Technology Group Corporation,Shenyang 110032,China)
出处
《微处理机》
2025年第3期45-51,共7页
Microprocessors
