摘要
JTAG标准,即IEEE1149.1标准,定义了一种国际通用的边界扫描结构和测试端口访问规范。如今众多芯片都兼容该标准。本文提出了一种基于JTAG的DSP调试系统的设计方案,支持断点,可观测内部寄存器、存储器,也可对存储器内容进行修改,对提高DSP开发效率有一定意义。
JTAG standard is the IEEE 1149. 1 standard, it defined an international general boundary-scan architecture and test access port. Many chips compliance with that standard. In this paper we designed a JATG standard-based DSP debug system, it supports breakpoint, internal registers and memories can be watched, the values in memories can also be modified. This design is meaningful for increasing DSP design efficiency.
出处
《电子测量技术》
2009年第5期108-110,115,共4页
Electronic Measurement Technology
