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基于UVM的FPGA仿真V&V技术研究

Research on FPGA Simulation V&V Technology Based on UVM
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摘要 针对传统现场可编程门阵列(FPGA)仿真验证存在手工测试工作量大、测试信号有限、验证效率低、成本高等问题,提出了一种基于通用验证方法(UVM)的全自动化FPGA仿真验证与确认(V&V)技术。该技术采用服务器集群作为硬件平台,基于UVM并结合自主开发的验证软件和商业软件工具,构建了完整的自动化验证功能模块。通过建立参考模型与待测模型的实时比对机制,实现了FPGA芯片系统中可编程逻辑模块正确性的自动化验证。试验结果表明,该技术能够实现无人干预的测试执行,随机生成海量测试信号以满足功能覆盖率100%的目标。相比传统技术,该技术验证效率提高了4倍、人力成本降低了75%。该技术为复杂数字系统的仿真验证提供了新的解决方案,对提升核电仪控系统等安全关键系统的验证质量具有重要应用价值。 Addressing the issues of traditional field programmable gate array(FPGA)simulation and verification,such as large manual testing workload,limited test signals,low verification efficiency,and high costs,etc.,a fully automated FPGA simulation verification and validation(V&V)technology based on the universal verification methodology(UVM)is proposed.This technology utilizes a server cluster as the hardware platform,UVM-based combining with custom-developed verification software and commercial software tools to establish a comprehensive automated verification functional module.By establishing a real-time comparison mechanism between the reference model and the under-test model,automated verification of the correctness of programmable logic modules within FPGA chip systems is achieved.Experimental results demonstrate that this technology enables unattended test execution,randomly generating a massive volume of test signals to achieve the goal of 100%functional coverage.Compared to traditional technology,this technology improves verification efficiency by 4 times and reduces labor costs by 75%.This technology provides a new solution for the simulation verification of complex digital systems and holds significant application value for enhancing the verification quality of safety-critical systems such as nuclear power instrumentation and control systems,etc.
作者 黄凯 李敬业 朱夕辉 时应盼 HUANG Kai;LI Jingye;ZHU Xihui;SHI Yingpan(Verification and Validation Center,State Nuclear Power Automation System Engineering Company,Shanghai 200241,China)
出处 《自动化仪表》 2025年第9期117-121,共5页 Process Automation Instrumentation
关键词 验证与确认 现场可编程门阵列 自动化测试 通用验证方法 仿真验证 服务器集群 代码覆盖率 Verification and validation(V&V) Field programmable gate array(FPGA) Automated test Universal verification methodology(UVM) Simulation verification Server cluster Code coverage rate
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  • 1张才科,叶小舟,刘纯.核电站设备信息监控系统的设计和实现[J].电子技术应用,2021,47(S01):316-322. 被引量:3
  • 2王旭姣,梁利平.一种基于事务的IP功能验证环境[J].微电子学与计算机,2007,24(7):27-30. 被引量:3
  • 3Janick Bergeron, Andrew Nightingale. Verification methodology manual for system verilog[ M]. New York: Springer Science + Business Media, Inc. 2006.
  • 4Synopsys, Inc. Reference verification methodology user guide version 8.6 [EB/OL]. [2008- 03- 18]. http:// www. synopsys.com/.
  • 5Mark Glasser. Advanced verification methodology cookbook version 2.0[ EB/OL ]. [ 2006 - 07 - 24 ]. Mentor Graphics Corporation. http://www. mentor. com/.
  • 6Cadence Design Systems, Inc. The unified verification methodology white paper [ EB/OL ]. [ 2005 - 02 - 01 ]. http://www. cadence. com/.
  • 7James Colgan. Open verification methodology relieves inefficiencies[ EB/OL]. [ 2007 - 09 - 07 ]. http://electonicdesign. com/Articles.
  • 8Tony Tsai. Techniques for selective reuse of verification components in hierarchical verification of large designs [ C]//SNUG(Synopsys Users Group). San Jose, 2008.
  • 9Bemd Stohr, Michael Simmons, Joachim Geishauser. FlexBench: reuse of verification IP to increase productivity[C]// Proceedings of the 2002 Design, Automation and Test in Europe Conference and Exhibition. Germary, 2002.
  • 10Jiri Gaisler, Edvin Catovic, Marko Isomaki, et al. GRLIB IP core user's manual version/. 0.19[EB/OL]. [2008 - 10 - 11 ]. http://www.gaisler.com/.

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