摘要
现场可编程门阵列(Field Programmable Gate Array,FPGA)的设计可靠性直接影响产品的可靠性,因此必须对FPGA设计进行高效和充分的验证.对传统功能仿真验证进行了分析,从验证方法和方法学角度阐述了验证平台的发展趋势,提出并实现了一种层次化的通用验证平台,利用该平台对两个被测设计(Design Under Test,DUT)进行验证.验证结果表明,该方法建立起的验证平台具备一定的通用性,可有效提高验证覆盖率和验证效率.
The reliability of circuitry implemented on FPGAs （Field Programmable Gate Arrays） affects the critical mission life directly. FPGAs design should be thoroughly verified in order to meet the requirement of high reliability. This paper analyzed traditional function verification and described the development of verification techniques and methodologies. We proposed and implemented a layered general purpose verification platform which is utilized to verify two DUT. The verification results exhibit that our platform is suitable for diverse applications and enhances the coverage and efficiency.
出处
《微电子学与计算机》
CSCD
北大核心
2010年第5期46-49,共4页
Microelectronics & Computer
关键词
FPGA
验证平台
验证方法学
通用
FPGA
verification platform
verification methodology
general purpose
