摘要
为了给芯片设计提供一种高效方便的调试方法,提出一种基于JTAG的片内调试系统。该系统包括调试系统控制模块、断点产生模块和JTAG接口。JTAG接口实现调试指令的发送与接收;断点产生模块是调试系统硬件调试的逻辑单元;调试系统控制模块则实现断点设置、单步运行、内存调试等功能。不同的调试指令可根据不同的硬件结构自动完成其各自的处理流程,而且不同的工作模式之间可以自由切换。该片内调试系统表现出了高性能,便于操作的特点,已经通过了实际的芯片测试。
An on⁃chip debugging system based on JTAG is proposed to provide an efficient and convenient debugging method for the chip design.The system is mainly composed of the debugging mode control module,breakpoint generation module and JTAG interface.The JTAG interface is used to realize the sending and receiving of debugging commands,the breakpoint generation module is the logic unit for hardware debugging of the system,and the debugging system control module is used to realize the breakpoint setting,single step running,memory debugging and other functions.The different debugging commands can automatically complete their own processing flow according to different hardware structures,and different working modes can be freely switched.The on⁃chip debugging system shows its characteristics of high performance and easy operation,and has passed the actual chip testing.
作者
姚霁
YAO Ji(Xi’an University of Posts and Telecommunications,Xi’an 710121,China)
出处
《现代电子技术》
北大核心
2020年第20期31-33,共3页
Modern Electronics Technique
基金
陕西省教育厅项目:一种通用的片上嵌入式调试系统研究资助(17JK0708)。
关键词
片内调试系统
系统设计
JTAG
调试指令
调试流程
模式切换
on⁃chip debugging system
system design
JTAG
debugging command
debugging process
mode switching
