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用于8051微控制器的片上调试系统的硬件设计 被引量:3

Hardware Design of an Onchip Debug System for 8051 MCU
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摘要 为工业用8051微控制器设计了一个片上调试系统,将调试功能集成到单片机芯片内部。该系统基于专用集成电路的设计流程设计,不仅具有控制8051单片机挂起、正常运行、单步运行和指令跳转的能力,而且能够读写片内寄存器、内外部数据,程序存储器、特殊功能寄存器的值,并能在其中设置硬件断点。该调试系统使用比工业上的JTAG标准接口占用空间更少的三线接口作为其和计算机的连接通道。系统在Xilinx的xc3s400 FPGA上完成功能验证,利用SMIC0.18μm工艺库完成版图设计。结果表明,系统有效解决基于传统软件调试和仿真器调试方式的弊端,并能省去用户购买商业仿真器的调试花费,减少调试成本,提高调试效率。提出的设计方法同样适用于其他微控制器片上调试系统的设计。 This paper designed an onchip debug system for industrial 8051 MCU with the process of ASIC and put the all debug ruction into one chip. The debug system not only can make the 8051 halt, run, step into or skip an instruction, but also can read and write all registers, internal and external program memories, data memories and SFRs and set hardware breakpoints in them. A three-wire interface is used by the debug system to connect computer which takes less space than the standard JTAG. It was verified on Xilinx's xc3s400 FPGA and P&R with SMIC 0. 18νm technology library. Results shows the system can effectively avoid the disadvantages of traditional debug method based on software simulation or emulator and it also can save much money for users spent on the commercial emulator and improve debug efficiency. The proposed design method is also applicable to other microcontroller.
出处 《计算机与数字工程》 2011年第9期142-146,共5页 Computer & Digital Engineering
基金 国家自然科学基金项目(编号:60976091)资助
关键词 片上调试系统 微控制器 仿真器 指令 寄存器 onchip debugger system, MCU, emulator, instruction, register
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参考文献8

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