摘要
基于DSP设计了一种采样频率可控的数字锁相放大器。针对数字锁相放大器对低通滤波器性能的要求,采用CIC和降采样的方法,实现了一种高效的窄带低通滤波器。测试结果表明,在采样频率为500kHz时,低通滤波器的通带截止频率可达0.5Hz;当输入信号幅度为5～150mV时,系统测试的相对误差小于0.5%;当输入信号幅度为1～50μV时,系统测试的相对误差小于2%;同时系统在1～120kHz的工作范围内,具有较好的一致性。
A novel digital lock-in amplifier whose sample frequency can be varied, is proposed based on digital signal process. The CIC filter and decimation method are introduced in the design to realize an efficient narrow band low pass fiher. The experiment result shows： when the sample frequency if 500 kHz, the cutoff frequency can reach to 0.5Hz; when the am- plitude of the input is 5-150 mV, the relative error is less than 0.5% when the amplitude of the input is 1-50 μV, the relative error is less than 2%. The system has good consistency from 1 kHz to 120 kHz.
出处
《现代电子技术》
2012年第3期191-195,198,共6页
Modern Electronics Technique
