摘要
报道了530-650 MHz 20W连续波Si-VDMOS场效应晶体管的研制结果。该器件采用polySi／WN／Au的多层复合栅技术降低栅串联电阻，采用栅下场氧化垫高技术降低反馈电容，采用穿通型硅外延材料优化导通电阻提高器件工作效率，全离子注入自对准工艺等技术，在上述频带内，连续波，28V工作电压下，静态电流50mA，该器件输出功率达20w，效率达49％，增益大于7．5dB。
A Si-VDMOS that can deliver CW output power of 20 W at 530-650 MHz has been developed. The multiplex polySi/WN/Au gate is employed for reducing the gate series resistance. The multiplex gate is also blocked up by using LOCOS （Local oxidation of silicon） technique to reduce the gate feedback capacitance. Penetrated silicon epilaxial material is chosen to improve device efficiency. Full ion-implantation technique is used for self-alignment. In the frequency range from 530 MHz to 650 MHz the device can deliver CW output power of 20 W with the power gain 7.5 dB and drain efficiency of 49% at Vds=28 V and Idq=50 mA.
出处
《固体电子学研究与进展》
CAS
CSCD
北大核心
2009年第2期192-194,286,共4页
Research & Progress of SSE
