摘要
采用高速A/D转换器和CPLD设计出了高速数据采集系统,利用多字节写入、单字节读出的方法降低数据写入的相对速度,实现了高速、大容量连续采样数据的存储.该系统既降低了生产成本及设计的复杂程度,又不失灵活性和实时性,是一种比较合理的高速数据采集方案.
Data collection is an important part of an electronic measurement and control system. The system of high-speed data sampling is designed with high-speed ADC and CPLD in this paper. The system adopts multibyte writing and single-byte reading method to slow down the relative speed of data writing so that the storage is achieved for high-speed, large volume continuous sampled data. The system reduces the cost and complexity of the design, as well as remains its flexibility and real-time property.
出处
《应用科技》
CAS
2006年第4期13-15,共3页
Applied Science and Technology
