摘要
介绍了一种利用高速A/D、高速FIFO、CPLD和计算机EPP接口实现高速数据采集的设计方案。该方案由CPLD控制高速A/D转换和高速FIFO的读写以及与EPP接口的数据传输,从而很好地解决了数据的高速存储,并可以很方便的与计算机进行数据交换。本文对系统的各主要部分进行了分别的介绍,最后给出系统的实现原理图。
By the use of high-speed AD, FIFO, CPLD, EPP port, a high-speed data acquirement system was designed. This scheme solves high-speed data storage and it is convenience to exchange data with computer. The main parts of this data acquirement system were introduced and the scheme of realization was also mentioned.
出处
《中国测试技术》
2007年第1期125-127,共3页
CHINA MEASUREMENT & TESTING TECHNOLOGY
