针对现场可编程门阵列(Field Programmable Gate Array,FPGA)电声测试数据采集电路的优化策略进行深入研究。在电声测试领域,数据采集精准性与效率极其关键,而FPGA凭借高性能属性得到广泛应用。在电声测试数据收集阶段,FPGA在采样率和...针对现场可编程门阵列(Field Programmable Gate Array,FPGA)电声测试数据采集电路的优化策略进行深入研究。在电声测试领域,数据采集精准性与效率极其关键,而FPGA凭借高性能属性得到广泛应用。在电声测试数据收集阶段,FPGA在采样率和多通道同步等方面面临难题。为化解这些困扰,制定一系列优化办法,包括高速模数转换器(Analog to Digital Converter,ADC)接口设计事项及多通道并行的架构体系,以增强电路性能,为电声测试给予更可靠且高效的数据收集支撑。展开更多
基于系统级封装(System in a Package, SiP)技术的SRAM型FPGA微系统广泛应用于航天领域。由于微系统复杂的封装结构,限制了大多数传统失效分析设备与分析方式的应用。针对微系统器件的故障诊断困难、测试流程复杂等可靠性问题,开展了常...基于系统级封装(System in a Package, SiP)技术的SRAM型FPGA微系统广泛应用于航天领域。由于微系统复杂的封装结构,限制了大多数传统失效分析设备与分析方式的应用。针对微系统器件的故障诊断困难、测试流程复杂等可靠性问题,开展了常见故障分析研究。对SRAM配置固有缺陷和FPGA内部配置刷新电路异常等典型故障的产生机理进行了深入分析和总结。结合理论分析和问题现象,提出了配置位回读校验测试及比对、辅助电源VCC, AUX电流参数一致性控制等测试筛选方法,有效提升了测试覆盖性。利用相应测试手段和数据分析方法,可精准定位失效机理与失效部位,对后续宇航用SRAM型FPGA微系统应用及筛选有重要意义。展开更多
Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or ...Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.展开更多
As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and m...As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and more important. Traditional dynamic simulation systems and digital-analog hybrid simulation systems are difficult to compromise on the economy, flexibility and accuracy. A multi-time scale test system of doubly fed induction generator based on FPGA+ CPU heterogeneous calculation is proposed in this paper. The proposed test system is based on the ADPSS simulation platform. The power circuit part of the test system is setup up using the EMT(electromagnetic transient simulation) simulation, and the control part uses the actual physical devices. In order to realize the close-loop testing for the physical devices, the power circuit must be simulated in real-time. This paper proposes a multi-time scale simulation algorithm, in which the decoupling component divides the power circuit into a large time scale system and a small time scale system in order to reduce computing effort. This paper also proposes the FPGA+CPU heterogeneous computing architecture for implementing this multitime scale simulation. In FPGA, there is a complete small time-scale EMT engine, which support the flexibly circuit modeling with any topology. Finally, the test system is connected to an DFIG controller based on Labview to verify the feasibility of the test system.展开更多
文摘针对现场可编程门阵列(Field Programmable Gate Array,FPGA)电声测试数据采集电路的优化策略进行深入研究。在电声测试领域,数据采集精准性与效率极其关键,而FPGA凭借高性能属性得到广泛应用。在电声测试数据收集阶段,FPGA在采样率和多通道同步等方面面临难题。为化解这些困扰,制定一系列优化办法,包括高速模数转换器(Analog to Digital Converter,ADC)接口设计事项及多通道并行的架构体系,以增强电路性能,为电声测试给予更可靠且高效的数据收集支撑。
文摘基于系统级封装(System in a Package, SiP)技术的SRAM型FPGA微系统广泛应用于航天领域。由于微系统复杂的封装结构,限制了大多数传统失效分析设备与分析方式的应用。针对微系统器件的故障诊断困难、测试流程复杂等可靠性问题,开展了常见故障分析研究。对SRAM配置固有缺陷和FPGA内部配置刷新电路异常等典型故障的产生机理进行了深入分析和总结。结合理论分析和问题现象,提出了配置位回读校验测试及比对、辅助电源VCC, AUX电流参数一致性控制等测试筛选方法,有效提升了测试覆盖性。利用相应测试手段和数据分析方法,可精准定位失效机理与失效部位,对后续宇航用SRAM型FPGA微系统应用及筛选有重要意义。
文摘Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.
基金supported by the State Grid Science and Technology Project (Title: Technology Research On Large Scale EMT Real-time simulation customized platform, FX71-17-001)
文摘As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and more important. Traditional dynamic simulation systems and digital-analog hybrid simulation systems are difficult to compromise on the economy, flexibility and accuracy. A multi-time scale test system of doubly fed induction generator based on FPGA+ CPU heterogeneous calculation is proposed in this paper. The proposed test system is based on the ADPSS simulation platform. The power circuit part of the test system is setup up using the EMT(electromagnetic transient simulation) simulation, and the control part uses the actual physical devices. In order to realize the close-loop testing for the physical devices, the power circuit must be simulated in real-time. This paper proposes a multi-time scale simulation algorithm, in which the decoupling component divides the power circuit into a large time scale system and a small time scale system in order to reduce computing effort. This paper also proposes the FPGA+CPU heterogeneous computing architecture for implementing this multitime scale simulation. In FPGA, there is a complete small time-scale EMT engine, which support the flexibly circuit modeling with any topology. Finally, the test system is connected to an DFIG controller based on Labview to verify the feasibility of the test system.
