摘要
为了进一步优化中低压屏蔽栅沟槽型金属氧化物场效应晶体管(Shielded Gate Trench MOSFET,SGT)的击穿电压与导通电阻的折中关系,在额定电压为50~100 V的SGT MOSFET设计中,引入双层外延设计,通过改善沟槽附近的横向电场分布情况从而有效地优化器件的电学特性。阐述了双层外延SGT结构的工作原理及仿真设计,通过调整双层外延的厚度比与电阻率比得到最优值。经Sentaurus TCAD从工艺流程的角度仿真验证,与传统60 V级SGT器件优化前相比,其优化后的击穿电压为70.16 V,在保证数据稳定性的基础下,击穿电压提高了6.9%,导通电阻Ron,sp降低了9.3%,其中Ron,sp最优值降低了12.8%,Baliga优值(BFOM)提高了25.8%。
In this study,we propose a double-layer epitaxial structure in the design of 50–100 V SGT MOSFETs.This helps in further optimizing the trade-off between the breakdown voltage and on-resistance in the low and medium-voltage shielded-gate trench-type metal-oxide-semiconductor field-effect transistors(SGT MOSFETs).This helps in enhancing the electrical characteristics of these devices by improving the transverse electric field distribution in the vicinity of the trench.We elucidate the underlying concept behind the bilayer epitaxial SGT structure and determine the optimal parameters by adjusting the thickness ratio and resistivity ratio of the bilayer epitaxial layers.The Sentaurus TCAD simulations demonstrate that the breakdown voltage increases to 70.16 V post-optimization when compared with the conventional 60 V SGT.Under the stable data conditions,the breakdown voltage is improved by 6.9%,the specific on-resistance(Ron,sp)is reduced by 9.3%,the optimal value of Ron,sp is decreased by 12.8%,and the Baliga figure of merit(BFOM)is improved by 25.8%.
作者
刘琪琪
冯全源
邱志勇
LIU Qiqi;FENG Quanyuan;QIU Zhiyong(Institute of Microelectronics,Southwest Jiaotong University,Chengdu 611756,P.R.China)
出处
《微电子学》
北大核心
2025年第2期309-314,共6页
Microelectronics
基金
国家自然科学基金重大项目(62090012)
中央在川高校院所重大科技成果转化项目(2022ZHCG0114)
四川省重大科技专项项目(2023ZDZX0016)。
