摘要
设计了一种全CMOS结构的亚阈值基准电压源,与传统的亚阈值CMOS基准电压源相比,通过使用2种不同阈值电压的NMOS管的栅源电压之差产生电流,无需额外电阻,降低了电路静态功耗。设计了一种输出电压产生电路,采用基于两极运放的单位增益缓冲器与栅极耦合的NMOS对级联,实现了正负温度系数电压相加。基于TSMC 0.18μm工艺完成了基准电压源版图的设计,版图面积为43μm×14μm。后仿真结果表明,该基准电压源平均输出电压为345 mV,功耗仅为12.6 nA,在−40~120℃的温度范围内,温度系数为7.65×10^(-6)/℃,在0.8~2 V电源电压变化下,线性调整率为0.173%,电源抑制比为68.02 dB@10 Hz。
A sub-threshold reference voltage source with an all-CMOS structure is designed,which leverages the gate-source voltage difference of NMOS transistors with two different threshold voltages.This design eliminates the need for additional resistors and reduces the static power consumption.An output voltage generation circuit is designed that combines a unit-gain buffer based on a bipolar operational amplifier with a gate-coupled NMOS pair to realize the summation of voltages with positive and negative temperature coefficients.The layout of the reference voltage source is implemented using the TSMC 0.18-μm process and occupies an area of 43μm×14μm.Post-simulation results show that the average output voltage is 345 mV,with a power consumption of only 12.6 nA.Over a temperature range of−40℃to 120℃,the temperature coefficient is 7.65×10^(−6)/℃,with a linear regulation rate of 0.173%across a supply voltage range of 0.8-2 V,and a power supply rejection ratio of 68.02 dB@10 Hz.
作者
黄可
张涛
刘劲
HUANG Ke;ZHANG Tao;LIU Jin(School of Electronics and Information,Wuhan University of Science and Technology,Wuhan 430000,P.R.China)
出处
《微电子学》
北大核心
2025年第3期393-399,共7页
Microelectronics
基金
国家自然科学基金资助项目(61873196)。
关键词
基准电压源
全CMOS
低功耗
亚阈值
voltage reference
All-CMOS
low power consumption
subthreshold
