摘要
作为全球智能移动终端的主板元器件载体的PCB(Print Circuit Board),迅猛地朝着高多层、高密度布线、高速、高频方向发展,高密度互联电路板HDI(High Density Interconnection Board)的层数持续增加,内层电镀层密集分布信号线的现象日益增多,对内层电镀层的阻抗管控提出了巨大的挑战。本文主要从设计优化、制程管控、品质拦截等方面,对高密度互连电路板内层电镀层阻抗进行研究,使高密度互连产品的内层电镀层阻抗,在子板蚀刻阶段就能够进行半成品品质预防,再在成品阶段进行品质确认,以满足高密度互连电路板内层电镀层的阻抗要求,保证了高速高频信号的传输。
As the mainboard component carrier for global intelligent mobile terminals,Printed Circuit Boards(PCBs)are rapidly advancing towards higher layers,higher density wiring,high speed,and high frequency.The number of layers in High-Density Interconnection(HDI)boards continues to increase,and the phenomenon of densely distributed signal lines in the inner plating layers is becoming more common,posing significant challenges for impedance control in the inner plating layers.This paper primarily studies the impedance of the inner plating layers of high-density interconnect(HDI)circuit boards from the aspects of design optimization,process control,and quality interception.By implementing quality prevention measures for the semi-finished products during the sub-board etching stage and performing quality confirmation during the final product stage,the impedance requirements of the inner plating layers of high-density interconnect circuit boards are met,ensuring the transmission of high-speed and high-frequency signals.
作者
雷璐娟
李金鸿
孙军
曹磊磊
甘小龙
何为
陈苑明
向斌
Lei Lujuan;Li Jinhong;Sun Jun;Cao Leilei;Gan XiaoLong;He Wei;Chen Yuanming;Xiang Bin
出处
《印制电路信息》
2025年第S1期36-42,共7页
Printed Circuit Information
关键词
高密度互连
内层电镀层
阻抗管控
半成品品质预防
High-Density Interconnect
Inner Plating Layer
Impedance Control
Semi-Finished Product Quality Prevention
