摘要
为了实现RV32IM处理器中整数乘法的操作,对RISC-V指令集中整数乘法的"M"标准扩展进行实现.设计中对于乘法指令的实现,采用基4的Booth算法和Wallace树型4-2压缩器.将该设计嵌入到RV32IM处理器中,通过仿真和SMIC 65nm高密度标准单元库进行综合表明:该乘法单元电路功能正确且显著提高了乘法的运算效率,最大工作频率能够达到500 MHz.
In order to achieve the integer multiplication operation in the RV32 IM processor,The ＂ M＂ standard extension of the integer multiplication of the RISC-V instruction set is implemented.For achieving the design for multiplication instructions,it uses the Booth algorithm of Base 4 and the Wallace Tree 4-2 Compressor.The design embedded in the RV32 IM processor,through the simulation and SMIC 65 nm high density standard cell library to show that：The multiplication circuit functions correctly and significantly improved the operation efficiency of the multiplication,the maximum operating frequency can reach 500 MHz.
作者
张凯
李涛
秦晨蕊
圣飞
ZHANG Kai;LI Tao;QIN Chen-rui;SHENG Fei(School of Electronic Engineering,Xi＇an University of Posts ＆ Telecommunications,Xi＇an 710121,China;School of Computing,Xi＇an University of Posts ＆ Telecommunications,Xi＇an 710121,China)
出处
《微电子学与计算机》
CSCD
北大核心
2018年第9期125-128,共4页
Microelectronics & Computer
基金
国家自然科学基金(61136002)
陕西教育厅科研项目(2050205)
