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基于FPGA的LZW控制器设计

Design of LZW Controller Based on FPGA
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摘要 为了实现对大容量数据进行远距离、快速无损传输,设计了一种基于FPGA的LZW实时硬件无损压缩系统。采用ALTERA公司CycloneⅡ系列EP2C5Q208C8N,利用Verilog HDL语言实现各模块的验证、时序仿真。结果表明,利用FPGA实现LZW的硬件压缩,能够有效的提高数据的存储和传输效率。 LZW algorithm is a lossless compression algorithm based on dynamic dictionary.In order to realize large capacity data for far and rapidly non-destructive transmission.This paper introduces a design of LZW real-time hardware lossless compression system based on FPGA.By using CycloneⅡEP2C5Q208C8N fromALTERA and the language of Verilog HDL,combined with the thought of state machine,it can realize verification of each module,timing simulation independently.The results show that by using FPGA to realize LZW hardware compression,it can improve the data storage and transmission efficiency.
出处 《长江大学学报(自科版)(上旬)》 CAS 2012年第12期120-122,6,共3页 JOURNAL OF YANGTZE UNIVERSITY (NATURAL SCIENCE EDITION) SCI & ENG
基金 国家自然科学基金项目(61173108) 中国石油创新基金项目(2010D-5006-0304)
关键词 无损压缩 LZW FPGA VERILOGHDL lossless compression LZW FPGA VerilogHDL state machine
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