期刊文献+

半导体测试系统优化

Optimization of Semiconductor Testing System
在线阅读 下载PDF
导出
摘要 为了进一步提高半导体测试生产中设备利用率、按期交货率和较低的在制品水平,改进改进半导体测试系统性能,本文提出了不同工件混合生产与设备专用生产相结合的生产模式.并在现有的MODD调度方法基础上,加入了设备切换准备时间的影响.用双向选择的方法,进一步改善了调度方法,减少了设备切换次数和切换时间.通过在仿真模型中的试验,验证了优化方法的有效性和可行性. In order to optimize the semiconductor testing system,and reach a higher utilization ratio and on time delivery rate and a lower WIP level,a new production mode was presented,which combines some other two different modes.A conversion time factor was added into the MODD scheduling method which was improved by the introduction of two-way choice method and allowed a lower conversion frequency and less conversion time.It is proved that the theory is feasible and effective by system simulation.
出处 《佳木斯大学学报(自然科学版)》 CAS 2011年第5期693-695,698,共4页 Journal of Jiamusi University:Natural Science Edition
关键词 半导体测试系统 动态调度 生产模式 系统优化 semiconductor testing system dynamic dispatching production mode system optimizationy
  • 相关文献

参考文献5

二级参考文献27

  • 1SUBHASH C S, SAMEER T S. Reduction of average cycle time at a wafer fabrication facility[R]. Blacksburg VA: Virginia Tech, 2001.
  • 2BERTSIMAS D,PASCHALIDIS I C,TSITSIKLIS J N. Scheduiing of multi-class networks: bounds on achievable performance[A]. LINCOLN. Workshop on Hierarchical Control for Real-Time Scheduling of Manufacturing Systems[C]. New Hampshire,Kluwer, Holland, 1992.16- 18.
  • 3KUMAR P R. Re-entrant lines[J]. Special Issue on Queueing Networks,1993, 13(1): 87-110.
  • 4KUMAR P R. Scheduling semiconductor manufacturing plants [J]. IEEE Control Systems, 1994, 1 (1): 33- 40.
  • 5OHRI P K. Practical issues in scheduling and dispatching in semiconductor wafer fabrication[J]. Journal of Manufacturing Systems, 1994, 12(6):474-485.
  • 6YOUNG H L, JONGKWAN P, SOOYOUNG K. Experimental study on input and bottleneck scheduling for a semiconductor fabrication line[J]. ⅡE Transactions, 2002,34 (2) : 179 -190.
  • 7SOOYOUNG K, SEUNGHEE Y, BOKANG K. Shift scheduling for steppers in the semiconductor wafer fabrication process [J]. ⅡE Transactions, 2002, 34(3):167-177.
  • 8SCOTT J M, JOHN W F, CARLYLE W M. A modified shifting bottleneck heuristic for minimizing total weighted tardiness in complex job shops[J]. Journal of Scheduling, 2002,5(5):247-262.
  • 9LI S, TANG T, COLLINS D W. Minimum inventory schedule with application in semiconductor fabrication [J]. IEEE Transactions on Semiconductor Manufacturing, 1996,9(1) :145-149.
  • 10LU S C H, RAMASWAMY D, KUMAR P R. Efficient scheduling policies to reduce mean and variance of cycletime in semiconductor manufacturing plants[J]. IEEE Transactions on Semiconductor Manufacturing, 1994,7 (3): 374 -388.

共引文献13

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部