摘要
针对某雷达频率综合器锁相环电路、RF收发器、DAC对电源噪声非常敏感,若直接采用开关电源供电,将造成电路性能大幅度下降的问题,采用了LDO改善上述电路。以某雷达频率综合器为例,探讨了LDO在大带宽范围实现高电源抑制比和低噪声的相关设计。
Aimed at that they are very sensitive to the phaselocked loop circuit,RF transceiver and DAC for power noise of frequency synthesizer of certain radar,and if the power was supplied by switch power,then it will result in fall of circuit performance substantially,and therefore LDO was adopted to improve the above circuits.In the paper,it took the frequency synthesizer of certain radar as an example,explored the related design of LDO to realize the rejection ratio of high power and the low noise in large band width rage.
出处
《四川兵工学报》
CAS
2011年第6期54-56,共3页
Journal of Sichuan Ordnance
关键词
LDO
高电源抑制比
低噪声
LDO
rejection ratio of high power
low noise
