摘要
文章分析了GPS基带信号处理跟踪环路中相关器的工作原理及特点,提出一种基于现场可编程门阵列(FP-GA)的GPS相关器结构。采取模块化设计思想,设计了载波产生器、CA码产生器、码-载波乘法器和积分累加器,并对相关器进行仿真分析。仿真结果表明,该数字相关器能在一定噪声背景下解调出信号。该数字相关器可与微处理器配合,对数据进行并行处理,提高运行速度。
This paper describes the thesis of correllator used in GPS base band signal processing.An architecture of the correllator based on FPGA is proposed.Adopted the idea of modular design,carrier wave generator,C/A code generator,code-carry multiplier,integrate-dumper is designed,and simulation is carried out.The result shows that the correllator can demodulate the signal under certain noise background.The correllator can operate with a microprocessor to have data processed parallelly.The operating speed is enhanced.
出处
《舰船电子工程》
2010年第9期92-95,共4页
Ship Electronic Engineering
基金
国家科技支撑计划重点项目课题(编号:2008BAJ11B01
2008BAJ11B05)资助
