摘要
设计了一种适用于数字功率放大器应用的全差分低功耗宽输入CMOS电压比较器.采用TSMC 0.18μm/3.3V CMOS工艺模型,用Cadence软件进行模拟仿真,比较器低频增益81.2dB,输入共模电压范围1.4-3.3V,整个电路的静态功耗仅248.6μW.运用该结构的比较器具有较低的失调电压,大幅度提高了比较器的精度;较宽的输入共模电压范围及低功耗,可用于数字功放等高性能模拟IP模块的设计.
Base on Digital Audio Power Amplifier, a low-power and wide-range fully differential voltage comparator was designed. Simulated with TSMC＇s 0.18μm/3.3V CMOS model using Cadence＇ s EDA software, the conaparator has an open loop gain of 81.2 dB, an ICMR of 1： 4--3.3V, while dissipating only 248.6/zW of static power. It has been shown that the comparator has a high accuracy , and a wide range input. This cell is applicable to high performance analog IP modules.
出处
《微电子学与计算机》
CSCD
北大核心
2008年第11期109-112,共4页
Microelectronics & Computer
基金
江苏省自然科学基金项目(BK2007026)
关键词
数字功放
低功耗
宽输入
失调电压
比较器
digital audio power amplifier
low power
wide range input
offset voltage
comparator
