期刊文献+

分簇结构超长指令字DSP编译器的设计与实现 被引量:7

Design and Implementation of Clustered VLIW DSP Compiler
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摘要 超长指令字(VLIW)是高端DSP普遍采用的体系结构,VLIWDSP在硬件上没有调度和冲突判决的机制,其性能的发挥完全依靠编译器的优化效果.基于可重定向编译基础设施IMPACT,为分簇VLIWDSPYHFT-D4设计与实现了优化编译器.其中着重讨论了可重定向信息的定义、代码注释、SIMD指令的支持、分簇寄存器分配以及指令级并行开发和资源冲突解决等内容.实验结果表明该编译器可以达到较好的优化效果. Very Long Instruction Word (VLIW) architecture has been adopted by most high performance DSPs. There are no hardware to schedule instructions or to detect conflictions in VLIW DSPs, so the performance of VLIW DSP is dependent on compiler optimization. Based on retargetable compiler infrastructure IMPACT, An optimized compiler has been design and implement for clustered VLIW DSP YHFT-D4. Definition of retargetable information, code annotation, SIMD instructions supporting, clustered register allocation, instruction-level-parallel (ILP) exploring and resource confliction solving are emphatically discussed. Experiments show that the compiler is very effective in optimization.
出处 《小型微型计算机系统》 CSCD 北大核心 2006年第2期348-353,共6页 Journal of Chinese Computer Systems
基金 国家"八六三"高技术研究发展计划基金项目(2004AA1Z1040)资助
关键词 VLIW DSP 编译器 分簇寄存器分配 指令级并行 VLIW DSP compiler clustered register allocation ILP
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参考文献14

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