摘要
存储器内建自测试是当前针对嵌入式随机存储器测试的一种经济有效的途径。它实质是 BIST测试算法在芯片内部的硬件实现,形成“片上BIST测试结构”,作为E RAM核与芯片系统其他逻辑电路的接口,负责控制功能,实现片上E RAM的自动测试。根据一个实际项目,本文介绍了MBIST的整体设计过程,并针对测试开销等给出了定量和定性的讨论。
Memory built-in self-test (MBIST) is a cost-effective approach for the embedded RAM testing. In fact it is the hardware implementation of the BIST algorithm inside the chip, forming the “on-chip BIST structure”. In the chip system as the interface between the E-RAM core and the other logic circuits it performs the control functions to auto-test the E-RAM. Based on an industry project, this paper presents the complete design flow of MBIST and gives the quantitative and qualitative discussion for the test overhead.
出处
《计算机工程与科学》
CSCD
2005年第4期40-42,65,共4页
Computer Engineering & Science
基金
国家自然科学基金资助项目(90207002
60242001)
北京市科技重点项目(H020120120130)
关键词
嵌入式随机存储器
测试
存储器
存储器核
自测试技术
design for test(DFT)
memory built-in self-test(MBIST)
fault model
March algorithm
