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CMOS输出缓冲器瞬态行为的SPICE建模 被引量:2

Transient Behavioral SPICE Modeling of CMOS Output Buffer
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摘要 根据CMOS输出缓冲器的特性,提出了一种新的输出缓冲器瞬态行为的SPICE建模方法。在把输出缓冲器的瞬态行为特性分为中间状态和稳态 2种工作状态的基础上,利用IBIS模型数据,构造了SPICE的瞬态行为模型。仿真中采用TYP、MIN和MAX3种输出模型,完整地反映了输出缓冲器的特性。最后,通过比较PSPICE软件与SigXplore软件的模拟结果,验证了该方法的有效性。 According to CMOS output buffer’s characteristics, this paper presented a new approach for building a transient behavioral SPICE model of output bufferis.Based on dividing the output buffer’s behavioral characteristics into intermediate state and stable state, the transient behavioral SPICE model was created by using IBIS model data. The entire output model should include the models of TYP, MIN and MAX cases.A comparison of simulated results between SPICE and SigXplore was made for verifying the efficiency.
出处 《南京理工大学学报》 EI CAS CSCD 北大核心 2005年第1期43-45,共3页 Journal of Nanjing University of Science and Technology
关键词 电子设计自动化 IBIS模型 SPICE模型 输出缓冲器 瞬态行为模型 EDA IBIS model SPICE model output buffer transient behavioral model
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参考文献5

  • 1蔡兴建,毛军发,陈建华,李征帆.基于IBIS模型的高速数字I/O缓冲器的瞬态行为建模[J].上海交通大学学报,2001,35(1):5-9. 被引量:5
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二级参考文献6

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