The combining microelectronic devices and associated technologies onto a single silicon chip poses a substantial challenge.However,in recent years,the area of silicon photonics has experienced remarkable advancements ...The combining microelectronic devices and associated technologies onto a single silicon chip poses a substantial challenge.However,in recent years,the area of silicon photonics has experienced remarkable advancements and notable leaps in performance.The performance of silicon on insulator(SOI)based photonic devices,such as fast silicon optical modulators,photonic transceivers,optical filters,etc.,have been discussed.This would be a step forward in creating standalone silicon photonic devices,strengthening the possibility of single on-chip nanophotonic integrated circuits.Suppose an integrated silicon photonic chip is designed and fabricated.In that case,it might drastically modify these combined photonic component costs,power consumption,and size,bringing substantial,perhaps revolutionary,changes to the next-generation communications sector.Yet,the monolithic integration of photonic and electrical circuitry is a significant technological difficulty.A complicated set of factors must be carefully considered to determine which application will have the best chance of success employing silicon-based integrated product solutions.The processing limitations connected to the current process flow,the process generation(sometimes referred to as lithography node generation),and packaging requirements are a few of these factors to consider.This review highlights recent developments in integrated silicon photonic devices and their proven applications,including but not limited to photonic waveguides,photonic amplifiers and filters,onchip photonic transceivers,and the state-of-the-art of silicon photonic in multidimensional quantum systems.The investigated devices aim to expedite the transfer of silicon photonics from academia to industry by opening the next phase in on-chip silicon photonics and enabling the application of silicon photonic-based devices in various optical systems.展开更多
We experimentally demonstrate high optical quality factor silica microdisk resonators on a silicon chip with large wedge angles by reactive ion etching. For 2-μm-thick microresonators, we have achieved wedge angles o...We experimentally demonstrate high optical quality factor silica microdisk resonators on a silicon chip with large wedge angles by reactive ion etching. For 2-μm-thick microresonators, we have achieved wedge angles of 59°, 63°,70°, and 79° with optical quality factors of 2.4 × 10~7, 8.1 × 10~6, 5.9 × 10~6, and 7.4 × 10~6, respectively, from ～80 μm diameter microresonators in the 1550 nm wavelength band. Also, for 1-μm-thick microresonators, we have obtained an optical quality factor of 7.3 × 10~6 with a wedge angle of 74°.展开更多
基于芯粒(Chiplet)的多芯片集成设计为超越传统系统级芯片的单片集成提供了一种灵活且可扩展的解决方案。然而,Chiplet间的通信已成为制约多芯片集成系统整体性能的瓶颈之一。在此背景下,中介层上网络(network on interposer,NoI)在多...基于芯粒(Chiplet)的多芯片集成设计为超越传统系统级芯片的单片集成提供了一种灵活且可扩展的解决方案。然而,Chiplet间的通信已成为制约多芯片集成系统整体性能的瓶颈之一。在此背景下,中介层上网络(network on interposer,NoI)在多芯片系统中发挥着至关重要的作用,直接影响多芯片集成系统的性能和开发成本。本文综述了基于Chiplet的NoI通信拓扑结构,深入探讨了当前Chiplet间通信架构的设计和实现方法,涵盖了从协议层、接口层到应用层的完整通信过程,不仅基于互连拓扑的形状进行了分类,还对每个类别进行了详细分析和交叉比较。此外,本文还探讨了芯片间通信技术的未来发展方向,强调了技术挑战和潜在解决方案,并重点分析总结了基于工作负载导向的可重用中介层和拓扑设计的重要性,旨在为研究人员梳理NoI技术现状并展望NoI技术的未来发展趋势。展开更多
文摘The combining microelectronic devices and associated technologies onto a single silicon chip poses a substantial challenge.However,in recent years,the area of silicon photonics has experienced remarkable advancements and notable leaps in performance.The performance of silicon on insulator(SOI)based photonic devices,such as fast silicon optical modulators,photonic transceivers,optical filters,etc.,have been discussed.This would be a step forward in creating standalone silicon photonic devices,strengthening the possibility of single on-chip nanophotonic integrated circuits.Suppose an integrated silicon photonic chip is designed and fabricated.In that case,it might drastically modify these combined photonic component costs,power consumption,and size,bringing substantial,perhaps revolutionary,changes to the next-generation communications sector.Yet,the monolithic integration of photonic and electrical circuitry is a significant technological difficulty.A complicated set of factors must be carefully considered to determine which application will have the best chance of success employing silicon-based integrated product solutions.The processing limitations connected to the current process flow,the process generation(sometimes referred to as lithography node generation),and packaging requirements are a few of these factors to consider.This review highlights recent developments in integrated silicon photonic devices and their proven applications,including but not limited to photonic waveguides,photonic amplifiers and filters,onchip photonic transceivers,and the state-of-the-art of silicon photonic in multidimensional quantum systems.The investigated devices aim to expedite the transfer of silicon photonics from academia to industry by opening the next phase in on-chip silicon photonics and enabling the application of silicon photonic-based devices in various optical systems.
基金supported by the National Basic Research Program of China (Nos. 2012CB921804 and 2011CBA00205)the National Natural Science Foundation of China (Nos. 61435007 and 11321063)
文摘We experimentally demonstrate high optical quality factor silica microdisk resonators on a silicon chip with large wedge angles by reactive ion etching. For 2-μm-thick microresonators, we have achieved wedge angles of 59°, 63°,70°, and 79° with optical quality factors of 2.4 × 10~7, 8.1 × 10~6, 5.9 × 10~6, and 7.4 × 10~6, respectively, from ～80 μm diameter microresonators in the 1550 nm wavelength band. Also, for 1-μm-thick microresonators, we have obtained an optical quality factor of 7.3 × 10~6 with a wedge angle of 74°.
文摘基于芯粒(Chiplet)的多芯片集成设计为超越传统系统级芯片的单片集成提供了一种灵活且可扩展的解决方案。然而,Chiplet间的通信已成为制约多芯片集成系统整体性能的瓶颈之一。在此背景下,中介层上网络(network on interposer,NoI)在多芯片系统中发挥着至关重要的作用,直接影响多芯片集成系统的性能和开发成本。本文综述了基于Chiplet的NoI通信拓扑结构,深入探讨了当前Chiplet间通信架构的设计和实现方法,涵盖了从协议层、接口层到应用层的完整通信过程,不仅基于互连拓扑的形状进行了分类,还对每个类别进行了详细分析和交叉比较。此外,本文还探讨了芯片间通信技术的未来发展方向,强调了技术挑战和潜在解决方案,并重点分析总结了基于工作负载导向的可重用中介层和拓扑设计的重要性,旨在为研究人员梳理NoI技术现状并展望NoI技术的未来发展趋势。
