We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the numb...We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the number of inner iterations in advance. The latter is to use the inexact Newton method for solution of the linear system of equations that arises at each stage of outer iterations. We give some new choices of iteration parameter and of forcing term, that ensure the convergence of iterations. The performance and efficiency of the proposed iteration is illustrated by numerical examples that represent a wide range of typical systems.展开更多
A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control ...A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.展开更多
A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization(PSO)is proposed.The parameter deviation of circuit elements is defined as the element of particle.Node-voltag...A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization(PSO)is proposed.The parameter deviation of circuit elements is defined as the element of particle.Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming(LP)equation.Through inducing the penalty coefficient,the LP equation is set as the fitness function for the PSO program.After evaluating the best position of particles,the position of the optimal particle states whether the actual parameter is within tolerance range or not.Simulation result shows the effectiveness of the method.展开更多
Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level perf...Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.展开更多
直流电压互感器(direct circuit voltage transformers,DCVTs)的低压输出模拟信号采用电缆传输时既无电气隔离同时易受电磁干扰,因此提出了采用光纤高线性度传输模拟信号的方案。利用双光源-光电探测器分别构成传输通道和闭环负反馈通道...直流电压互感器(direct circuit voltage transformers,DCVTs)的低压输出模拟信号采用电缆传输时既无电气隔离同时易受电磁干扰,因此提出了采用光纤高线性度传输模拟信号的方案。利用双光源-光电探测器分别构成传输通道和闭环负反馈通道,负反馈通道的光电探测器变换电流反馈至输入端对电光-光电传输系数非线性进行抑制,通过控制系统模型分析了非线性抑制控制策略和非线性抑制效果,分析了模拟信号光纤传输系统的电路设计关键要素。对模拟信号光纤传输系统进行开环传输和闭环反馈传输非线性特性对比测试,结果表明,通过闭环负反馈的传输方案将模拟信号光纤传输非线性误差从百分之几提高到了±0.05%以内。最后将模拟信号光纤传输系统应用到DCVT中进行了线性度测试,试验结果表明:模拟信号光纤传输系统能很好地适用于直流配电网中模拟信号电气隔离和消除电磁干扰的应用需求。展开更多
新型存算一体架构可在存储阵列内直接执行计算操作,有望突破冯·诺伊曼架构的能效瓶颈。文章聚焦于提升可编程线性随机存取存储器(programmable linear random-access memory, PLRAM)在神经网络推理中的计算精度,通过优化器件结构,...新型存算一体架构可在存储阵列内直接执行计算操作,有望突破冯·诺伊曼架构的能效瓶颈。文章聚焦于提升可编程线性随机存取存储器(programmable linear random-access memory, PLRAM)在神经网络推理中的计算精度,通过优化器件结构,显著拓宽晶体管I_(d)-V_(d)输出特性的线性范围。实验数据显示,与传统闪存芯片相比,改进型闪存芯片在相近的能耗下实现了更集中的推理误差分布,且各层芯片的推理精度均优于前代芯片,最终推理准确率达到94.6%,较传统闪存芯片提升了约4.5%。结果表明,扩展晶体管的线性工作区能够有效抑制前向推理过程中的非线性误差累积,从而显著提高模拟计算的可靠性与芯片推理精度,为后续高精度、低功耗神经网络加速器的设计提供新的器件优化方向。展开更多
文摘We propose a continuous analogy of Newton’s method with inner iteration for solving a system of linear algebraic equations. Implementation of inner iterations is carried out in two ways. The former is to fix the number of inner iterations in advance. The latter is to use the inexact Newton method for solution of the linear system of equations that arises at each stage of outer iterations. We give some new choices of iteration parameter and of forcing term, that ensure the convergence of iterations. The performance and efficiency of the proposed iteration is illustrated by numerical examples that represent a wide range of typical systems.
文摘A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.
基金supported by the Program for New Century Excellent Talents in University under Grant No.NCET-05-0804partly supported by Chinese National Programs for High Technology Research and Development under Grant No.2006AA06Z222
文摘A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization(PSO)is proposed.The parameter deviation of circuit elements is defined as the element of particle.Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming(LP)equation.Through inducing the penalty coefficient,the LP equation is set as the fitness function for the PSO program.After evaluating the best position of particles,the position of the optimal particle states whether the actual parameter is within tolerance range or not.Simulation result shows the effectiveness of the method.
基金Supported by a Research Grant from The National Science Foundation(CCF:0728996)
文摘Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.
文摘直流电压互感器(direct circuit voltage transformers,DCVTs)的低压输出模拟信号采用电缆传输时既无电气隔离同时易受电磁干扰,因此提出了采用光纤高线性度传输模拟信号的方案。利用双光源-光电探测器分别构成传输通道和闭环负反馈通道,负反馈通道的光电探测器变换电流反馈至输入端对电光-光电传输系数非线性进行抑制,通过控制系统模型分析了非线性抑制控制策略和非线性抑制效果,分析了模拟信号光纤传输系统的电路设计关键要素。对模拟信号光纤传输系统进行开环传输和闭环反馈传输非线性特性对比测试,结果表明,通过闭环负反馈的传输方案将模拟信号光纤传输非线性误差从百分之几提高到了±0.05%以内。最后将模拟信号光纤传输系统应用到DCVT中进行了线性度测试,试验结果表明:模拟信号光纤传输系统能很好地适用于直流配电网中模拟信号电气隔离和消除电磁干扰的应用需求。
文摘新型存算一体架构可在存储阵列内直接执行计算操作,有望突破冯·诺伊曼架构的能效瓶颈。文章聚焦于提升可编程线性随机存取存储器(programmable linear random-access memory, PLRAM)在神经网络推理中的计算精度,通过优化器件结构,显著拓宽晶体管I_(d)-V_(d)输出特性的线性范围。实验数据显示,与传统闪存芯片相比,改进型闪存芯片在相近的能耗下实现了更集中的推理误差分布,且各层芯片的推理精度均优于前代芯片,最终推理准确率达到94.6%,较传统闪存芯片提升了约4.5%。结果表明,扩展晶体管的线性工作区能够有效抑制前向推理过程中的非线性误差累积,从而显著提高模拟计算的可靠性与芯片推理精度,为后续高精度、低功耗神经网络加速器的设计提供新的器件优化方向。
