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A 2.69 ppm/℃ bandgap reference with 42 ppm/V line sensitivity for battery management system 被引量:1
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作者 Jing Wang Feixiang Zhang +2 位作者 Zhiyuan He Hui Zhang Lin Cheng 《Journal of Semiconductors》 2025年第6期31-42,共12页
This paper introduces a high-precision bandgap reference(BGR)designed for battery management systems(BMS),fea-turing an ultra-low temperature coefficient(TC)and line sensitivity(LS).The BGR employs a current-mode sche... This paper introduces a high-precision bandgap reference(BGR)designed for battery management systems(BMS),fea-turing an ultra-low temperature coefficient(TC)and line sensitivity(LS).The BGR employs a current-mode scheme with chopped op-amps and internal clock generators to eliminate op-amp offset.A low dropout regulator(LDO)and a pre-regula-tor enhance output driving and LS,respectively.Curvature compensation enhances the TC by addressing higher-order nonlinear-ity.These approaches,effective near room temperature,employs trimming at both 20 and 60°C.When combined with fixed cur-vature correction currents,it achieves an ultra-low TC for each chip.Implemented in a CMOS 180 nm process,the BGR occu-pies 0.548 mm²and operates at 2.5 V with 84μA current draw from a 5 V supply.An average TC of 2.69 ppm/℃ with two-point trimming and 0.81 ppm/℃ with multi-point trimming are achieved over the temperature range of-40 to 125℃.It accommo-dates a load current of 1 mA and an LS of 42 ppm/V,making it suitable for precise BMS applications. 展开更多
关键词 bandgap reference high precision low temperature coefficient small line sensitivity battery management system BMS
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A Piecewise-Linear Compensated Bandgap Reference 被引量:6
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作者 王红义 来新泉 +1 位作者 李玉山 李先锐 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2004年第7期771-777,共7页
A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some su... A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some sub ranges.At different temperature sub ranges the bandgap reference can be compensated by different linear functions.Since the temperature sub range is much narrower than the whole range,the compensation error can be reduced significantly.Theoretically,the precision can be improved unlimitedly if the sub ranges are narrow enough.In the given example,with only three temperature sub ranges,the temperature coefficient of a conventional bandgap reference drops from 1 5×10 -5 /℃ to 2×10 -6 /℃ over the -40℃ to 120℃ temperature range. 展开更多
关键词 bandgap voltage reference piecewise linearly compensated curvature corrected temperature coefficient reference circuits
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A Novel CMOS Current Mode Bandgap Reference 被引量:8
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作者 幸新鹏 李冬梅 王志华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第7期1249-1253,共5页
A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overco... A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overcomes the systematic mismatch of conventional current mode bandgap references. The proposed bandgap reference has been implemented in UMC 0.18μm mixed mode technology. Under the supply voltage of 1.6V, the proposed bandgap reference provides an output reference of 1.45V and consumes 27μA of supply current. Using no curvature compensation,it can reach a temperature coefficient of 23ppm/℃ from 30 to 150℃ with a line regulation of 2. 1mV/V from 1.6 to 3V and a PSRR of 40dB at DC frequency. The chip area of the bandgap reference (without pad) is 0. 088mm^2. 展开更多
关键词 CMOS bandgap reference current mode
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A Near-1V 10ppm/℃ CMOS Bandgap Reference with Curvature Compensation 被引量:8
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作者 幸新鹏 李冬梅 王志华 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第1期24-28,共5页
A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique,... A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique, this bandgap reference can reach a temperature coefficient of 10ppmFC from 0 to 150℃. With a 1.1V supply voltage,the supply current is 43μA and the PSRR is 55dB at DC frequency. This bandgap reference has been verified in a UMC 0.18μm mixed mode CMOS technology and occupies 0. 186mm^2 of chip area. 展开更多
关键词 CMOS bandgap reference low voltage curvature compensation
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A resistorless CMOS bandgap reference with below 1 V output
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作者 程剑平 朱卓娅 魏同立 《Journal of Southeast University(English Edition)》 EI CAS 2003年第4期317-319,共3页
This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct ... This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct operation point at power on. The simulation with Hspice was carried out using a 0 25 μm CMOS process. The results indicate that the proposed BGR circuit can operate on a 2 2 to 3 3 V power supply and its output voltage has a variation of 11 mV at -10 to 80 ℃. 展开更多
关键词 bandgap reference start up circuit CMOS low voltage
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Design of a Bandgap Reference with a Wide Supply Voltage Range 被引量:4
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作者 孙越明 赵梦恋 吴晓波 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第8期1529-1534,共6页
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, ... An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD (Bipolar-CMOS-DMOS) technology. The experimental results show that all main expectations are achieved. 展开更多
关键词 wide supply voltage range bandgap reference line regulation sleep mode micro power
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Bandgap Reference Design by Means of Multiple Point Curvature Compensation 被引量:6
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作者 姜韬 杨华中 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第4期490-495,共6页
A new method,namely multiple point curvature compensation (MPCC),is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are pre... A new method,namely multiple point curvature compensation (MPCC),is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are presented. Being different from traditional techniques, this idea focuses on finding multiple temperatures in the whole range at which the first order derivatives of the output reference voltage equal zero. In this way, the curve of the output reference voltage is flattened and a better effect of curvature compensation is achieved. The circuitry is simulated in ST Microelectronics 0. 18μm CMOS technology, and the simulated result shows that the average temperature coefficient is only 1ppm/℃ in the range from - 40 to 125℃. 展开更多
关键词 bandgap reference curvature compensation sub-threshold circuit
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High-PSRR High-Order Curvature-Compensated CMOS Bandgap Voltage Reference 被引量:3
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作者 Qianneng Zhou Yunsong Li +3 位作者 Jinzhao Lin Hongjuan Li Yu Pang Wei Luo 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2015年第5期116-124,共9页
A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CM... A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CMOS process. Compared to the conventional curvature-compensated BGR which adopted a piecewise-linear current,the temperature characterize of the proposed BGR is effectively improved by adopting two kinds of current including a piecewise-linear current and a current proportional 1. 5 party to the absolute temperature T. By adopting a low dropout( LDO) regulator whose output voltage is the operating supply voltage of the proposed BGR core circuit instead of power supply voltage VDD,the proposed BGR with LDO regulator achieves a well PSRR performance than the BGR without LDO regulator. Simulation results show that the proposed BGR with LDO regulator achieves a temperature coefficient of 2. 1 × 10-6/ ℃ with a 1. 8 V power supply voltage and a line regulation of 4. 9 μV / V at 27 ℃. The proposed BGR with LDO regulator at 10 Hz,100 Hz,1 k Hz,10 k Hz and 100 k Hz have the PSRR of- 106. 388,- 106. 388,- 106. 38,- 105. 93 and-88. 67 d B respectively. 展开更多
关键词 bandgap voltage reference low DROPOUT REGULATOR temperature coefficient power supply REJECTION ratio
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Design of Bandgap Reference in Switching Power Supply 被引量:2
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作者 XU Li NIU Ping-juan FU Xian-song DING Ke PENG Xiao-lei 《Semiconductor Photonics and Technology》 CAS 2009年第2期101-104,129,共5页
A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventio... A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventional bandgap reference circuit,and combined with the integral performance of IC,the specific design index of the bandgap reference is put forward. In the meantime,the circuit and the layout are designed with Chartered 0.35 μm dual gate CMOS process. The simulation result shows that the coefficient is less than 30ppm/℃ with the temperature from -50 ℃ to 150 ℃. The bandgap reference has the characteristics of low power and high PSRR. 展开更多
关键词 CMOS bandgap reference low temperature coefficient PSRR
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Curvature Compensated CMOS Bandgap Reference with Novel Process Variation Calibration Technique 被引量:1
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作者 Jiancheng Zhang Mao Ye +1 位作者 Yiqiang Zhao Gongyuan Zhao 《Journal of Beijing Institute of Technology》 EI CAS 2018年第2期182-188,共7页
A lowtemperature coefficient( TC) bandgap reference( BGR) with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of ... A lowtemperature coefficient( TC) bandgap reference( BGR) with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio( PSRR) of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^(-6)/℃-9. 56 × 10^(-6)/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^(-6)/℃. 展开更多
关键词 bandgap reference voltage process variation resistance-trimming current-calibration curvature compensation temperature coefficient
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New Curvature-Compensated CMOS Bandgap Voltage Reference 被引量:4
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作者 Lu Shen Ning Ning Qi Yu Yan Luo Chun-Sheng Li 《Journal of Electronic Science and Technology of China》 2007年第4期370-373,共4页
A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp... A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz. 展开更多
关键词 bandgap voltage reference CMOS curvature-compensation technique finite current gain.
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Trimmable bandgap reference circuit with exponential curvature compensation
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作者 Hong-Zhuan Chen Fei Chu +3 位作者 Wen-Tao Lu Tie-Liang Zhang Wen-Chang Li Wei Gao 《Journal of Electronic Science and Technology》 EI CAS CSCD 2023年第3期52-62,共11页
This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature ... This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature as well as reduce the influence of resistance-temperature dependency.Considering the degraded circuit performance caused by the process deviation,the trimmable module of the temperature coefficient(TC)is introduced to improve the circuit stability.The circuit has the advantages of simple structure,high linear stability,high TC accuracy,and trimmable TC.It consumes an area of 0.09 mm^(2)when fabricated by using the 0.25-μm complementary metal-oxide-semiconductor(CMOS)process.The proposed circuit achieves the simulated power supply rejection(PSR)of about-78.7 dB@1 kHz,the measured TC of~4.7 ppm/℃over a wide temperature range from-55℃to 125℃with the 2.5-V single-supply voltage,and the tested line regulation of 0.10 mV/V.Such a high-performance bandgap reference circuit can be widely applied in high-precision and high-reliability electronic systems. 展开更多
关键词 bandgap reference Exponential curvature compensation Temperature coefficient(TC) Trimmable
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IC Implementation of a Programmable CMOS Voltage Reference 被引量:3
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作者 张科 郭健民 +1 位作者 孔明 李文宏 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2007年第1期36-41,共6页
A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0.... A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV. 展开更多
关键词 voltage regulation modules current mode bandgap voltage reference temperature coefficient power supply rejection ratio programmable voltage reference
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基于ASL1000的Bandgap Trim 设计及其算法研究 被引量:2
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作者 付贤松 马富民 +2 位作者 田会娟 杜桥 罗涛 《固体电子学研究与进展》 CAS 北大核心 2019年第1期54-58,76,共6页
在芯片生产过程中,由于工艺的影响,带隙基准电压V_(BG)会存在偏差。在芯片测试阶段,需要对V_(BG)进行trim修调,使其满足芯片参数要求。简要分析了带隙基准电压误差的来源,提出了一种E-Fuse修调电路,通过程序中的代码控制修调电阻的大小,... 在芯片生产过程中,由于工艺的影响,带隙基准电压V_(BG)会存在偏差。在芯片测试阶段,需要对V_(BG)进行trim修调,使其满足芯片参数要求。简要分析了带隙基准电压误差的来源,提出了一种E-Fuse修调电路,通过程序中的代码控制修调电阻的大小,使V_(BG)满足要求。同时,在该修调电路的基础上,采用了一种新型算法,使得测试芯片V_(BG)的时间缩短了近558 ms,减少了测试时间,降低了测试成本。 展开更多
关键词 带隙基准电压 E-Fuse 修调电路 算法
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高稳定性LDO集成电路设计 被引量:4
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作者 李亮 黄思仪 +3 位作者 宋惠安 钮小超 成珏飞 汪义旺 《中国集成电路》 2025年第1期59-64,共6页
本文设计了一款高稳定性的LDO集成电路,它具有输出稳定性高的优点。在考虑参数指标折中的条件下设计了性能可靠的带隙电压基准源电路和两级共源共栅误差放大器电路以及限流保护电路,通过调节各模块的参数来平衡LDO的性能。设计完成在UMC... 本文设计了一款高稳定性的LDO集成电路,它具有输出稳定性高的优点。在考虑参数指标折中的条件下设计了性能可靠的带隙电压基准源电路和两级共源共栅误差放大器电路以及限流保护电路,通过调节各模块的参数来平衡LDO的性能。设计完成在UMC 0.11μm工艺下,通过Cadence仿真与验证,结果表明设计的LDO在输入电压2V到5V间均可以稳定输出1.8V的电压值;温度系数为5.33ppm/℃;线性调整率为0.00012%/V;负载调整率为0.0173%/mA,显示出本设计的LDO线性稳压器性能优异,满足实际应用的需求。 展开更多
关键词 电源管理 LDO 带隙基准源 误差放大器 限流电路
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一种无运放带曲率补偿的带隙基准设计
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作者 张波 邹循成 +2 位作者 卢光林 董凯珠 张加宏 《电子元件与材料》 北大核心 2025年第8期969-976,共8页
针对传统带隙基准中运放失调电压引起的精度劣化及功耗问题,提出了一种无运放架构的带隙基准电路,结合指数型曲率补偿技术以实现低温漂和低功耗性能。区别于运放钳位的方式,采用低失配的双极性晶体管直接钳位电压,有效消除了运放输入失... 针对传统带隙基准中运放失调电压引起的精度劣化及功耗问题,提出了一种无运放架构的带隙基准电路,结合指数型曲率补偿技术以实现低温漂和低功耗性能。区别于运放钳位的方式,采用低失配的双极性晶体管直接钳位电压,有效消除了运放输入失调电压对基准精度的影响;构建共源共栅电流镜和负反馈环路,确保电源电压抑制能力和系统的稳定性;引入非线性曲率补偿电路,提高了输出基准电压的温度稳定性。基于华虹0.18μm BCD工艺,通过Cadence Spectre进行电路设计及仿真验证,仿真结果表明:输入3.3 V电源电压,在-40~125℃温度范围内,温漂系数为1.66×10^(-6)℃^(-1),低频段的电源电压抑制比为-69 dB,静态电流约为10μA。该设计的综合性能表现优异,提供了一种低温漂兼顾低功耗的基准电压源解决方案。 展开更多
关键词 带隙基准 无运放 曲率补偿 低温漂 低功耗
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应用于高精度ADC的低失调低噪声高精度基准电压源
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作者 刘帘曦 仵少飞 +4 位作者 王格夫 戴宇轩 王钰源 朱樟明 廖栩锋 《电子学报》 北大核心 2025年第6期1865-1873,共9页
本文设计了一种应用于高精度模数转换器(Analog-to-Digital Converter,ADC)的低失调、低噪声、高精度带隙基准(BandGap Reference,BGR)芯片.针对传统架构的局限性,本工作提出了两项新技术:首先,采用反馈提升技术将运算放大器的失调电压... 本文设计了一种应用于高精度模数转换器(Analog-to-Digital Converter,ADC)的低失调、低噪声、高精度带隙基准(BandGap Reference,BGR)芯片.针对传统架构的局限性,本工作提出了两项新技术:首先,采用反馈提升技术将运算放大器的失调电压和低频噪声等效到基准输出时减小至1/23;其次,提出了一种高精度基极电流补偿技术,降低不同工艺角和器件失配造成的基准输出偏移.设计的BGR芯片采用0.18μm CMOS工艺实现,芯片面积0.142×0.258 mm^(2).测试结果表明,该BGR在1.2 V电源电压下输出0.6 V的参考电压,静态电流31μA,0.1~10.0 Hz的积分噪声为2.79μVrms,在-40~125℃温度范围内,基准源输出电压的温度系数是3.6 ppm/℃. 展开更多
关键词 低失调 低噪声 高精度 带隙基准 反馈提升技术 高精度基极电流补偿
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A Piecewise Curvature-Corrected CMOS Bandgap Reference with Negative Feedback
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作者 李景虎 王永生 +1 位作者 喻明艳 叶以正 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第10期1974-1979,共6页
A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects... A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects the nonlinear temperature dependence of the first-order BGR. The piecewise corrected current generator also forms negative feedback to improve the line regulation and power supply rejection (PSR). Measurement results show the proposed BGR achieves a maximum temperature coefficient (TC) of 21.2ppm/℃ without trimming in the temperature range of - 50-125℃ and a PSR of - 60dB at 2.6V supply voltage. The line regulation is 0.8mV/V in the supply range of 2.6-5.6V. It is successfully implemented in an SMIC 0.35μm 5V n-well digital CMOS process with the effective chip area of 0.04mm^2 and power con- sumption of 0.18mW. The reference is applied in a 3,5V optical receiver trans-impedance amplifier. 展开更多
关键词 piecewise curvature-corrected bandgap reference line regulation PSR temperature coefficient
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一种低温漂高精度分段温度补偿带隙基准源电路 被引量:1
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作者 王宇飞 杨艳 刘威 《电子设计工程》 2025年第2期1-6,共6页
基于TSMC 0.18μm CMOS工艺,提出了一种低温漂、高精度的分段温度补偿带隙基准源电路。该电路由启动电路、带隙基准核心电路和低温漂温度补偿电路组成。通过采用分段温度补偿方法,对一阶带隙基准电压温度曲线中的低温段和高温段分别进... 基于TSMC 0.18μm CMOS工艺,提出了一种低温漂、高精度的分段温度补偿带隙基准源电路。该电路由启动电路、带隙基准核心电路和低温漂温度补偿电路组成。通过采用分段温度补偿方法,对一阶带隙基准电压温度曲线中的低温段和高温段分别进行补偿,从而显著降低了基准电压的温度系数,最终实现了低温度系数和高精度的带隙基准电压输出。仿真结果表明,当温度从-40℃变化至125℃时,采用分段温度补偿后的带隙基准电压温度系数大幅减小,从15.47×10^(-6)减小为1.141×10^(-6),有效提高了温度稳定性和电压精度。 展开更多
关键词 带隙基准源 分段温度补偿 低温度系数 高精度
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一种高性能带隙基准源的设计
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作者 王凌翔 张涛 刘劲 《电子元件与材料》 北大核心 2025年第1期88-94,共7页
针对传统带隙基准电压受运放失调电压影响较大,而无运放带隙基准电源的噪声抑制效果不佳的问题,设计了一种降低失调电压影响的高性能带隙基准电路。设计中通过改变三极管的连接方式使得该结构具有抑制失调电压的能力和更高的电源噪声抑... 针对传统带隙基准电压受运放失调电压影响较大,而无运放带隙基准电源的噪声抑制效果不佳的问题,设计了一种降低失调电压影响的高性能带隙基准电路。设计中通过改变三极管的连接方式使得该结构具有抑制失调电压的能力和更高的电源噪声抑制能力,从而提高了输出电压的精度和电源抑制比(PSRR)。同时,利用三极管基极电流的负温度高阶项对带隙输出进行低温曲率补偿,使得带隙基准电压具有极低的温度系数。该电路采用华虹宏力0.18μm BCD工艺,经过仿真验证,在电源电压为5 V时,静态工作电流约为6μA,基准输出电压约为1.27 V,温度系数为6.082×10^(-6)/℃。在10 Hz时,PSRR为-110.1 dB;在10 kHz时,PSRR为-70.9 dB。 展开更多
关键词 带隙基准 高电源抑制比 低温漂 温度补偿
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