This paper introduces a high-precision bandgap reference(BGR)designed for battery management systems(BMS),fea-turing an ultra-low temperature coefficient(TC)and line sensitivity(LS).The BGR employs a current-mode sche...This paper introduces a high-precision bandgap reference(BGR)designed for battery management systems(BMS),fea-turing an ultra-low temperature coefficient(TC)and line sensitivity(LS).The BGR employs a current-mode scheme with chopped op-amps and internal clock generators to eliminate op-amp offset.A low dropout regulator(LDO)and a pre-regula-tor enhance output driving and LS,respectively.Curvature compensation enhances the TC by addressing higher-order nonlinear-ity.These approaches,effective near room temperature,employs trimming at both 20 and 60°C.When combined with fixed cur-vature correction currents,it achieves an ultra-low TC for each chip.Implemented in a CMOS 180 nm process,the BGR occu-pies 0.548 mm²and operates at 2.5 V with 84μA current draw from a 5 V supply.An average TC of 2.69 ppm/℃ with two-point trimming and 0.81 ppm/℃ with multi-point trimming are achieved over the temperature range of-40 to 125℃.It accommo-dates a load current of 1 mA and an LS of 42 ppm/V,making it suitable for precise BMS applications.展开更多
A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some su...A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some sub ranges.At different temperature sub ranges the bandgap reference can be compensated by different linear functions.Since the temperature sub range is much narrower than the whole range,the compensation error can be reduced significantly.Theoretically,the precision can be improved unlimitedly if the sub ranges are narrow enough.In the given example,with only three temperature sub ranges,the temperature coefficient of a conventional bandgap reference drops from 1 5×10 -5 /℃ to 2×10 -6 /℃ over the -40℃ to 120℃ temperature range.展开更多
A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overco...A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overcomes the systematic mismatch of conventional current mode bandgap references. The proposed bandgap reference has been implemented in UMC 0.18μm mixed mode technology. Under the supply voltage of 1.6V, the proposed bandgap reference provides an output reference of 1.45V and consumes 27μA of supply current. Using no curvature compensation,it can reach a temperature coefficient of 23ppm/℃ from 30 to 150℃ with a line regulation of 2. 1mV/V from 1.6 to 3V and a PSRR of 40dB at DC frequency. The chip area of the bandgap reference （without pad） is 0. 088mm^2.展开更多
A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique,...A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique, this bandgap reference can reach a temperature coefficient of 10ppmFC from 0 to 150℃. With a 1.1V supply voltage,the supply current is 43μA and the PSRR is 55dB at DC frequency. This bandgap reference has been verified in a UMC 0.18μm mixed mode CMOS technology and occupies 0. 186mm^2 of chip area.展开更多
This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct ...This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct operation point at power on. The simulation with Hspice was carried out using a 0 25 μm CMOS process. The results indicate that the proposed BGR circuit can operate on a 2 2 to 3 3 V power supply and its output voltage has a variation of 11 mV at -10 to 80 ℃.展开更多
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, ...An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio （PSRR） and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD （Bipolar-CMOS-DMOS） technology. The experimental results show that all main expectations are achieved.展开更多
A new method,namely multiple point curvature compensation （MPCC）,is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are pre...A new method,namely multiple point curvature compensation （MPCC）,is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are presented. Being different from traditional techniques, this idea focuses on finding multiple temperatures in the whole range at which the first order derivatives of the output reference voltage equal zero. In this way, the curve of the output reference voltage is flattened and a better effect of curvature compensation is achieved. The circuitry is simulated in ST Microelectronics 0. 18μm CMOS technology, and the simulated result shows that the average temperature coefficient is only 1ppm/℃ in the range from - 40 to 125℃.展开更多
A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CM...A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CMOS process. Compared to the conventional curvature-compensated BGR which adopted a piecewise-linear current,the temperature characterize of the proposed BGR is effectively improved by adopting two kinds of current including a piecewise-linear current and a current proportional 1. 5 party to the absolute temperature T. By adopting a low dropout( LDO) regulator whose output voltage is the operating supply voltage of the proposed BGR core circuit instead of power supply voltage VDD,the proposed BGR with LDO regulator achieves a well PSRR performance than the BGR without LDO regulator. Simulation results show that the proposed BGR with LDO regulator achieves a temperature coefficient of 2. 1 × 10-6/ ℃ with a 1. 8 V power supply voltage and a line regulation of 4. 9 μV / V at 27 ℃. The proposed BGR with LDO regulator at 10 Hz,100 Hz,1 k Hz,10 k Hz and 100 k Hz have the PSRR of- 106. 388,- 106. 388,- 106. 38,- 105. 93 and-88. 67 d B respectively.展开更多
A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventio...A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventional bandgap reference circuit,and combined with the integral performance of IC,the specific design index of the bandgap reference is put forward. In the meantime,the circuit and the layout are designed with Chartered 0.35 μm dual gate CMOS process. The simulation result shows that the coefficient is less than 30ppm/℃ with the temperature from -50 ℃ to 150 ℃. The bandgap reference has the characteristics of low power and high PSRR.展开更多
A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of ...A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio（ PSRR） of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^（-6）/℃-9. 56 × 10^（-6）/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^（-6）/℃.展开更多
A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp...A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.展开更多
This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature ...This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature as well as reduce the influence of resistance-temperature dependency.Considering the degraded circuit performance caused by the process deviation,the trimmable module of the temperature coefficient(TC)is introduced to improve the circuit stability.The circuit has the advantages of simple structure,high linear stability,high TC accuracy,and trimmable TC.It consumes an area of 0.09 mm^(2)when fabricated by using the 0.25-μm complementary metal-oxide-semiconductor(CMOS)process.The proposed circuit achieves the simulated power supply rejection(PSR)of about-78.7 dB@1 kHz,the measured TC of~4.7 ppm/℃over a wide temperature range from-55℃to 125℃with the 2.5-V single-supply voltage,and the tested line regulation of 0.10 mV/V.Such a high-performance bandgap reference circuit can be widely applied in high-precision and high-reliability electronic systems.展开更多
A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0....A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.展开更多
针对智能导钻传感系统在极端温度条件下的应用需求,基于国内0.15μm SOI CMOS工艺,采用正负温度系数电阻平衡、MOS晶体管背栅反馈以及偏置电流温度补偿等技术,设计一款可工作于-50~250℃的宽温区低温漂基准电压源。仿真结果表明,该基准...针对智能导钻传感系统在极端温度条件下的应用需求,基于国内0.15μm SOI CMOS工艺,采用正负温度系数电阻平衡、MOS晶体管背栅反馈以及偏置电流温度补偿等技术,设计一款可工作于-50~250℃的宽温区低温漂基准电压源。仿真结果表明,该基准电压源在-50~250℃温度范围内能够稳定输出2.537 V的基准电压,温度系数为14.45 ppm/℃时,低频下电源抑制比达到-63.1 dB,在不同电源电压和工艺角下仿真均表现出良好的稳定性。该电路适用于需要在宽温度区域内保持高精度和稳定性的电子系统。展开更多
基金supported by the National Natural Science Foundation of China(NSFC)under grant No.62204235。
文摘This paper introduces a high-precision bandgap reference(BGR)designed for battery management systems(BMS),fea-turing an ultra-low temperature coefficient(TC)and line sensitivity(LS).The BGR employs a current-mode scheme with chopped op-amps and internal clock generators to eliminate op-amp offset.A low dropout regulator(LDO)and a pre-regula-tor enhance output driving and LS,respectively.Curvature compensation enhances the TC by addressing higher-order nonlinear-ity.These approaches,effective near room temperature,employs trimming at both 20 and 60°C.When combined with fixed cur-vature correction currents,it achieves an ultra-low TC for each chip.Implemented in a CMOS 180 nm process,the BGR occu-pies 0.548 mm²and operates at 2.5 V with 84μA current draw from a 5 V supply.An average TC of 2.69 ppm/℃ with two-point trimming and 0.81 ppm/℃ with multi-point trimming are achieved over the temperature range of-40 to 125℃.It accommo-dates a load current of 1 mA and an LS of 42 ppm/V,making it suitable for precise BMS applications.
文摘A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some sub ranges.At different temperature sub ranges the bandgap reference can be compensated by different linear functions.Since the temperature sub range is much narrower than the whole range,the compensation error can be reduced significantly.Theoretically,the precision can be improved unlimitedly if the sub ranges are narrow enough.In the given example,with only three temperature sub ranges,the temperature coefficient of a conventional bandgap reference drops from 1 5×10 -5 /℃ to 2×10 -6 /℃ over the -40℃ to 120℃ temperature range.
文摘A novel CMOS bandgap reference is presented. The output reference of this new current mode structure can be set to an arbitrary value above the bandgap voltage of silicon,avoiding offset in application. It also overcomes the systematic mismatch of conventional current mode bandgap references. The proposed bandgap reference has been implemented in UMC 0.18μm mixed mode technology. Under the supply voltage of 1.6V, the proposed bandgap reference provides an output reference of 1.45V and consumes 27μA of supply current. Using no curvature compensation,it can reach a temperature coefficient of 23ppm/℃ from 30 to 150℃ with a line regulation of 2. 1mV/V from 1.6 to 3V and a PSRR of 40dB at DC frequency. The chip area of the bandgap reference （without pad） is 0. 088mm^2.
文摘A low voltage bandgap reference with curvature compensation is presented. Using current mode structure, the proposed bandgap circuit has a minimum voltage of 900mV. Compensated through the VEB linearization technique, this bandgap reference can reach a temperature coefficient of 10ppmFC from 0 to 150℃. With a 1.1V supply voltage,the supply current is 43μA and the PSRR is 55dB at DC frequency. This bandgap reference has been verified in a UMC 0.18μm mixed mode CMOS technology and occupies 0. 186mm^2 of chip area.
文摘This paper proposes a resistorless CMOS bandgap reference (BGR) circuit capable of generating a voltage less than 1V and presents a high performance start up circuit that can make the BGR circuit achieve the correct operation point at power on. The simulation with Hspice was carried out using a 0 25 μm CMOS process. The results indicate that the proposed BGR circuit can operate on a 2 2 to 3 3 V power supply and its output voltage has a variation of 11 mV at -10 to 80 ℃.
文摘An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management （PM） controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio （PSRR） and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD （Bipolar-CMOS-DMOS） technology. The experimental results show that all main expectations are achieved.
文摘A new method,namely multiple point curvature compensation （MPCC）,is proposed for the design of a bandgap reference,and its design principles, theoretical derivation, and one feasible circuitry implementation are presented. Being different from traditional techniques, this idea focuses on finding multiple temperatures in the whole range at which the first order derivatives of the output reference voltage equal zero. In this way, the curve of the output reference voltage is flattened and a better effect of curvature compensation is achieved. The circuitry is simulated in ST Microelectronics 0. 18μm CMOS technology, and the simulated result shows that the average temperature coefficient is only 1ppm/℃ in the range from - 40 to 125℃.
基金Sponsored by the National Natural Science Foundation of China(Grant No.61471075)the 2013 Program for Innovation Team Building at Institutions of Higher Education in Chongqing(The Innovation Team of Smart Medical System and Key Technology)
文摘A high-PSRR high-order curvature-compensated CMOS bandgap voltage reference( BGR),which has the performances of high power supply rejection ratio( PSRR) and low temperature coefficient,is designed in SMIC 0. 18 μm CMOS process. Compared to the conventional curvature-compensated BGR which adopted a piecewise-linear current,the temperature characterize of the proposed BGR is effectively improved by adopting two kinds of current including a piecewise-linear current and a current proportional 1. 5 party to the absolute temperature T. By adopting a low dropout( LDO) regulator whose output voltage is the operating supply voltage of the proposed BGR core circuit instead of power supply voltage VDD,the proposed BGR with LDO regulator achieves a well PSRR performance than the BGR without LDO regulator. Simulation results show that the proposed BGR with LDO regulator achieves a temperature coefficient of 2. 1 × 10-6/ ℃ with a 1. 8 V power supply voltage and a line regulation of 4. 9 μV / V at 27 ℃. The proposed BGR with LDO regulator at 10 Hz,100 Hz,1 k Hz,10 k Hz and 100 k Hz have the PSRR of- 106. 388,- 106. 388,- 106. 38,- 105. 93 and-88. 67 d B respectively.
文摘A bandgap voltage reference is designed to meet the requirements of low power loss,low temperature coefficient and high power source rejection ratio(PSRR) in the intergrated circuit. Based on the analysis of conventional bandgap reference circuit,and combined with the integral performance of IC,the specific design index of the bandgap reference is put forward. In the meantime,the circuit and the layout are designed with Chartered 0.35 μm dual gate CMOS process. The simulation result shows that the coefficient is less than 30ppm/℃ with the temperature from -50 ℃ to 150 ℃. The bandgap reference has the characteristics of low power and high PSRR.
基金Supported by the National Natural Science Foundation of China(61604109)the National High-Tech R&D Program of China(2015AA042605)
文摘A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio（ PSRR） of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^（-6）/℃-9. 56 × 10^（-6）/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^（-6）/℃.
文摘A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.
文摘This paper proposes an improved exponential curvature-compensated bandgap reference circuit to exploit the exponential relationship between the current gainβof the bipolar junction transistor(BJT)and the temperature as well as reduce the influence of resistance-temperature dependency.Considering the degraded circuit performance caused by the process deviation,the trimmable module of the temperature coefficient(TC)is introduced to improve the circuit stability.The circuit has the advantages of simple structure,high linear stability,high TC accuracy,and trimmable TC.It consumes an area of 0.09 mm^(2)when fabricated by using the 0.25-μm complementary metal-oxide-semiconductor(CMOS)process.The proposed circuit achieves the simulated power supply rejection(PSR)of about-78.7 dB@1 kHz,the measured TC of~4.7 ppm/℃over a wide temperature range from-55℃to 125℃with the 2.5-V single-supply voltage,and the tested line regulation of 0.10 mV/V.Such a high-performance bandgap reference circuit can be widely applied in high-precision and high-reliability electronic systems.
文摘A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.
