摘要
提出了一种温度系数可配置的高阶非线性带隙基准补偿技术。利用偏置支路实现闭环负反馈,在提高PSRR的同时,控制电路内部管子的直流工作点对基准电路进行非线性高阶温度补偿。通过优化电路参数设计,进一步改善了温度系数并且提高了整个电路的工艺稳定性。基于CSMC 0.5μm CMOS工艺的仿真结果表明,在-55~125℃温度范围内两种模式基准电压温度系数为1.24×10^(-6)/℃和2.841×10^(-6)/℃,并具有非常好的工艺稳定性。在低频范围内平均电源抑制比达到46.3 d B和70.6 d B以上。
A new nonlinear temperature-compensation method which can reduce the temperature coefficient effectively by controlling the DC operating points of the critical nodes in circuits has been proposed in this paper. Based on this method, the tempreture-coefficient of the BGR circuit can be configured. Using negative feedback loop improve the PSRR and optimization method of the parameters further to improve the temperature coefficient and reduce the process sensibility of the whole voltage reference circuits. Simulated in CSMC 0.5 μm HV CMOS process, it has a temperature coefficient in the-55 ℃ to 125 ℃ range of 1.24×10^-6/℃and 2.841 ×10^-6/℃ at TT corner, also the temperature coefficient has smaller changes variers from other different corners. At low frequncy range its average PSRR value is higer than 46.3 d B and 70.6 d B.
出处
《电子与封装》
2016年第9期18-23,共6页
Electronics & Packaging
关键词
带隙基准
温度系数
电源抑制比
工艺稳定性
bandgap reference
temperature coefficient
PSRR
process stability
