摘要
使用裂缝尖端附近小矩形路径J积分方法计算电子封装分层传播的能量释放率,并在热循环加载下使用高频超声显微镜技术测定了B型和D型两种倒装焊封装在焊点有无断裂时芯片/底充胶界面的分层裂缝扩展速率。由有限元模拟给出的能量释放率和实验测得的裂缝扩展速率得到可作为倒装焊封装可靠性设计依据的Paris半经验方程。
The strain energy release rates G we re calculated by employing the J -int egral in a small rectangular path near the crac k tip in the related finite element simulations.And under thermal cycling loading,the crack p ropagation rates of two types of test chip(type B and D)were determined by using C -SAM inspectio n.The Paris half -empirical equatio n,which can be used as a design base of flip chip package reliability,is determined from the energy release rates simulated and the crack propagation rates measured.
出处
《功能材料与器件学报》
CAS
CSCD
2002年第2期144-148,共5页
Journal of Functional Materials and Devices
基金
国家自然科学基金重点项目(批准号:19834070)
上海市科技发展基金项目(No.99ZD14055)
关键词
电子封装
倒装焊
底充胶分层
有限元模拟
能量释放率
flip -chip
interfacial delamination
finite element simulation
str ain energy release rate