摘要
常用查找表法和CORDIC算法在FPGA上实现正余弦函数求值。查找表法实现简单,输出延迟小,但随着计算精度的提高,存储资源需求呈指数增长;传统的CORDIC方法硬件资源消耗大,且输出时延长。论文提出一种新方法,将查找表和SF-CORDIC算法相结合,以查表所得中间向量为迭代初始向量,对剩余旋转角应用SF-CORDIC算法,迭代系数取0或1,减少了x、y通路的计算开销和舍入误差;并对z通路使用加减交替法提前生成剩余旋转角,以减少每级流水线的延迟。所需查找表的地址位数和迭代次数分别较常规查表法和CORDIC算法减少一半左右。基于FPGA完成了算法的设计、仿真与误差分析,结果表明该方法可利用较少的硬件资源和存储资源实现较高精度和较低时延的正余弦函数求值。
Lookup-table and CORDIC algorithm are usually used to compute sine cosine function on FPGA. The for- mer is easy to implement with short output delay, but large amount of memory units are needed and entries grow exponential- ly with the accuracy of input angles. The latter can achieve higher accuracy with less memory units, but needs more hardware resource and has long output delay. A novel method combined with lookup table and SF CORDIC algorithm is proposed, which acquires initial iteration vector from lookup table and applies SF CORDIC algorithm to the residual angle. The address width of lookup-table and the number of iterations is reduced almost by half comparing with traditional lookup table method and CORDIC algorithm respectively. SF CORDIC algorithm can significantly reduce the hardware consumption and rounding error of datapath x and y by using coefficient 0 or 1, and shorten the pipeline delay by generating each residual angle of data- path in advance with altrenate addition and subtraction. The design, simulation and error analysis of the novel method have been completed based on FPGA, which indicates that it can achieve higher accuracy and lower output delay with less hard ware resource and few memory units.
出处
《计算机与数字工程》
2014年第3期359-363,共5页
Computer & Digital Engineering
基金
海军工程大学自然科学基金(编号:HGDQNJJ10028)资助
