期刊文献+

并行CORDIC算法的研究及FPGA实现 被引量:7

Research of the Parallel CORDIC Algorithm and Its Implementation in FPGA
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摘要 本文讨论旋转模式下CORDIC算法的符号预测和迭代计算问题,采用并行计算方法来加速CORDIC算法。文中提出分段符号预测和增加校正迭代的符号预测机制,使用分段迭代展开和三输入加法树来完成CORDIC算法的迭代计算,有效地减少了计算的级数和硬件开销,提高了计算性能。最后,在Altera的StratixII芯片上实现了并行CORDIC结构。 This paper discusses the sign prediction and iterative calculation of the CORDIC algorithm in the rotation mode, and uses a parallel computation technique to accelerate it. We propose the sign prediction mechanism of subsection sign prediction and adding the correcting rotation, and use a method of unfolded subsection iteration and a three-in adder tree to perform the iterative calculation of the CORDIC algorithm. These techniques effectively reduce the correcting rotations and the cost of hardware, and enhance the computing performance. Finally the parallel CORDIC architecture is implemented on the FPGA chip of StratixlI from Altera.
出处 《计算机工程与科学》 CSCD 2008年第8期75-78,共4页 Computer Engineering & Science
基金 国家自然科学基金资助项目(60633050)
关键词 CORDIC 符号预测 FPGA CORDIC sign prediction FPGA
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参考文献7

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同被引文献43

  • 1赵创,张为.基于HCORDIC的浮点运算协处理器的设计[J].电子测量与仪器学报,2020(11):58-65. 被引量:6
  • 2甘露,吴国纲,徐政五,杨芸霞,陈晓旭.改进型MVR-CORDIC算法研究[J].电子科技大学学报,2004,33(5):489-491. 被引量:6
  • 3安印龙,许琪,杨银堂.并行加法器的研究与设计[J].晋中师范高等专科学校学报,2003,20(4):330-334. 被引量:9
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  • 6Meyer-Baese U.数字信号处理的FPGA实现[M].刘凌,译.2版.北京:清华大学出版社,2006:87-92.
  • 7张欣.扩频痛惜数字基带信号处理算法及其VLSI实现[M].北京:科学出版社,2004:68-72.
  • 8刘明业,蒋敬旗.硬件描述语言Verilog-HDL[M].北京:清华大学出版社,2001.
  • 9薛小刚,葛毅敏.Xilinx ISE 9.X FPGA/COLD设计指南[M].北京:人民邮电出版社,2008.
  • 10赵亚成 吴海波.基于FPGA的快速加法器的设计与实现.现代电子技术,2000,(5):57-60.

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