摘要
近年发展的双采样技术（double sampling）[1]是提高sigma-delta调制器信噪比的一种有效的方法，而电容的失配是影响其信噪比的重要因素。分析表明，双采样技术在三阶系统中的应用，电容失配引起前馈信号混叠，由此产生的噪声对系统信噪比的影响不可忽略。本文提出了一种结合ILA DAC[2]和前端完全浮动电容结构的电路形式，将这种结构应用在第二级调制器的积分器上，使双采样电容失配产生的噪声远小于量化噪声，从而满足了三阶调制器的性能要求。
Double sampling method developed recent years can be used to improve the SNR of sigma-delta modulator without requiring faster operation amplifier. The key limitation comes from the mismatch in sampling capacitor. High frequency noise of both feedback signal and forward path signal mixed into the base-band will degrade the SNR seriously. A configuration which combines ILA DAC with fully floating switched capacitor is proposed for the second stage modulator of cascaded modulator to suppress the noise arisen from sampling capacitor mismatch.
出处
《电路与系统学报》
CSCD
2000年第4期17-20,共4页
Journal of Circuits and Systems
