期刊文献+

半加成工艺制作精细线路研究 被引量:21

Preliminary Study of Semi-additive Process for Fine Line
在线阅读 下载PDF
导出
摘要 随着电子产品向着高密度方向的发展,印制电路板和封装基板的盲孔孔径和线路的线宽/线间距越来越小,半加成工艺在印制电路板及封装载板的制作过程中得到越来越广泛的应用。采用半加成工艺,以ABF材料作为介质层,制作线宽/间距为14μm/14μm线路和65μm盲孔。介绍半加成工艺制作的主要流程、使用材料、工艺难点及解决方法。 Latest build-up boards are requested to achieve high-density wiring,and reduction of blind via hole diameter and reduction of line width and space of patterns are rapidly progressing.For that reason,PCB and IC substrate are coming to be manufactured by semi-additive process.We fabricated fine line 14 μm/14 μm and blind via hole(65 μm) using ABF material by semi-additive process.Processes,materials,difficulties and solutions would be addressed.
出处 《电子工艺技术》 2013年第3期151-154,共4页 Electronics Process Technology
关键词 精细线路 半加成工艺 盲孔 ABF Fine line Semi-additive process Blind via hole ABF
  • 相关文献

参考文献8

  • 1Venkatesh Sundaram. Advances in electronic packaging technologies by uhrasmall mierovias, super-fine inlerconnections and low loss polymer dieleclrics [D].Atlanta: Georgia Institute of Technology. 2009: 1-3.
  • 2王俊峰.电子封装与微组装密封技术发展[J].电子工艺技术,2011,32(4):197-201. 被引量:22
  • 3罗头平,王波,安兵,吴懿平.嵌入式电子加成制造技术[J].电子工艺技术,2010,31(2):77-80. 被引量:2
  • 4Takuya Yamamoto, Takashi Kataoka, John Andresakis. Allowable copper thickness for fine pitch patterns formed by a subtractive method[J]. Circuit World, 2001, 27 ( 1 ) : 6-12.
  • 5Hiroyuki Nishiwaki. Katsuhiro Yoshida. Shenghua Li. Metallization for Semi-Additive Processing of Build-Up Dielectric Materials, Part I: Process Development Overview[EB/OL]. [2012-12-14]. http:// pebOO7.eom/pages/columns.cgi ? clmid=29&arfid=59158&_pf_= 1.
  • 6Hiroyuki Nishiwaki, Kalsuhiro Yoshida, Shenghua Li. Metallization for Semi-Additive Processing, Part I1: Processing of Next-Generation Bui!.d-Up Dielectric Materials[EB/OL]. [2012-L2-L4]. http://www. pcbOO7.com/pagesh, ohnnns.cgi?clmid=29&artid=59445&_pf=l.
  • 7Bryan Chueh, Cindy Wu, Crystal Li, et al. Adhesion Promotion Technology for Semi-Additive Process[C]. Microsystems, Packaging, Assembly & Circuits Technology Conference, 2008:314-317.
  • 8林金堵,吴梅珠.PCB电镀铜技术与发展[J].印制电路信息,2009(12):27-32. 被引量:26

二级参考文献20

  • 1隆志力,吴运新,王福亮.芯片封装互连新工艺热超声倒装焊的发展现状[J].电子工艺技术,2004,25(5):185-188. 被引量:13
  • 2何健锋.LTCC基板制造及控制技术[J].电子工艺技术,2005,26(2):75-81. 被引量:57
  • 3张彩云,任成平.凸点芯片倒装焊接技术[J].电子与封装,2005,5(4):13-15. 被引量:8
  • 4程明生,陈该青,蒋健乾.倒装芯片热电极键合工艺研究[J].电子与封装,2006,6(6):9-13. 被引量:2
  • 5蔡积庆.电镀铜导通孔填充工艺[J].印制电路信息,2006(8):28-30. 被引量:14
  • 6Reich H. The third dimension in microelectronics packaging [C].4th european microelectronics and packaging conference & exhibition,Friedrichshafen ,Germany ,2003,1 -6.
  • 7Erik Jung. Chip - in - polymer:volumetric packaging solution using PCB technology [ C ]. SEMI/IEEE IEMT, 2002,46 - 49.
  • 8Lars Boettcher. Embedding of chips for system in package realization - technology and applications [ C ]. Microsystems packaging assembly & circuits technology conference ,2008,383 - 386.
  • 9Baik Woo Lee, Venky Sundaram, Boyd Wiedenman et al. Chip -last embedded active for system -on -package (SOP) [ C ]. 2007 electronic components and technology confernce, USA,2007,292 - 298.
  • 10Nangalia S, Deane P, Bonfede Set al. Issues with fine pitch bumping and assembly, advanced packaging materials:Processes properties and interfaces [ C ]. 2000 proceedings international symposium ,2000,118 - 123.

共引文献47

同被引文献72

引证文献21

二级引证文献35

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部