摘要
通过对多值逻辑、绝热电路和三值触发器工作原理及结构的研究,提出一种新颖的三值绝热JKL触发器的设计方案.该方案首先以电路三要素理论为指导,推导出三值绝热JKL触发器的元件级函数式,采用不同阈值的MOS管实现相应的电路结构.然后结合三值绝热文字电路,应用三值绝热JKL触发器进一步设计绝热九进制异步计数器.最后,HSPICE模拟结果表明,所设计电路具有正确的逻辑功能,与传统三值JKL触发器和九进制异步计数器相比,节省能耗均在75%以上.
A design scheme of a novel ternary adiabatic JKL flip-flop was presented by research on multi-valued logic, adiabatic circuits, and the structure and working principle of ternary flip-flops. In the scheme, firstly, the theory of three essential circuit elements was taken as the guide, the component-level expressions of the ternary adiabatic JKL flip-flop were derived, and the corresponding circuit structure was realized by adopting MOS transistors with different thresholds. Secondly, an adiabatic novenary asynchronous counter was further designed by applying the ternary adiabatic JKL flip-flop and the ternary adiabatic literal circuit. Finally, HSPICE simulation results verify that the proposed circuits have correct logic function. Compared with a conventional ternary JKL flip-flop and a novenary asynchronous counter, the average energy consumption of the designed circuits is both saved more than 75%.
出处
《北京科技大学学报》
EI
CAS
CSCD
北大核心
2012年第12期1464-1468,共5页
Journal of University of Science and Technology Beijing
基金
国家自然科学基金资助项目(61234002
61076032)
浙江省自然科学基金资助项目(Z1111219)
关键词
触发电路
多值逻辑
设计
能耗
flip flop circuits
multi-valued logics
design
energy consumption
