摘要
NRS4000微处理器是西北工业大学航空微电子中心设计的32位嵌入式RISC微处理器，在指令系统级与Intel的80960KA完全兼容，具有自主版权，规模约30万等效门．在微体系结构上采用了RISC核心结构，提出了一种基于核心RISC微操作的设计方案，具有简单、通用、灵活的特征，而且为处理器开发更细粒度的并行性提供可能．结合多执行部件、流水执行和乱序执行等先进技术，使得NRS4000既实现了与80960KA的指令系统兼容，又在微体系结构上具有很好的可扩展性．着重讨论了它的RISC核心结构的设计思想和设计实现．NRS4000微处理器的设计采用MentorGraphics工具，用VHDL语言描述、模拟和综合．
The design of a 32-bit embedded RISC microprocessor NRS4000 is described, which is compatible with Intel 80960KA at instruction set level. The microprocessor with a 512K-byte instruction cache, a 5-stage pipeline, and a large register file, is implemented in the scale of 300K equivalent gates. In section l, the overview of NRS4oOO is given.In section 2, the data path of NRS4000 is proposed and the design method of control path is confirmed. In section 3, a control path design scheme on the core RISC micro-operations is presented, which simplifies the control path design of NRS4000, supplies the flexibility and extendibility in its control path design, and also makes it possible to develop the more fine parallelism further. In section 4, a high performance 5-stage pipeline is designed. To coordinate the dependencies between instructions executed in 5-stage pipeline, an effective resolution using hardware and software techniques is shown. In section 5, the logical design of NRS4000 is given. ln section 6, the VHDL description and simulation are introduced. In section 7, some conclusions are given. The top-down design of a self-made patent microprocessor using the high-level synthesis is an effective way under present clrcumstances.
出处
《计算机研究与发展》
EI
CSCD
北大核心
2000年第6期758-763,共6页
Journal of Computer Research and Development
基金
航空基金!97F53056
