摘要
介绍了一种时域测量频率的系统方案。阐述并分析了该方案的工作原理和相对误差。在对比传统测频方案两点不足的基础上对其进行了创新改进。此基于FPGA设计的无间歇测频系统硬件电路简单稳定高效,通过在正负闸门时间内双计数器连续交替计数实现无间歇测量,从而达到测量时段内覆盖全部频率的目的。在频率测量精度方面,脉冲上升沿触发使正负闸门时间与待测频率实现严格同步,通过改变置数闸门能够达到很高的测量精度。Quartus波形仿真结果也达到设计的预期效果。
This paper introduces a system solution of measuring frequency in time domain.Described and analyzed the working principle and the relative error of the program.In contrast to the traditional frequency measurement,the new solution overcomes its two shortcomings.The design of the hardware circuit experiment is simple structure,high stability.The double counter work alternately so that it can cover all the frequencies in measurement period.In terms of measurement accuracy the gate time is strict synchronization with the test frequency through the pulse edge trigger and high measurement accuracy can be achieved by changing the set gate-number.Quartus waveform simulation results reached to the expected effect of the design
出处
《电子测量技术》
2012年第9期99-100,105,共3页
Electronic Measurement Technology
关键词
无间歇测频
FPGA
置数
正负闸门
non-intermission frequency measurement
FPGA
set number
positive and negative gate