摘要
本文采用复杂可编程逻辑器件(CPLD)和分立器件,设计实现了IEEE 1149.4混合信号边界扫描标准实验测试结构。为了提高互连测试的故障诊断能力,文中对模拟边界模块(ABM)开关结构进行了一些修改。针对ABM单元的这些修改允许测试者可以将模拟输入信号与多个电压进行比较。当测试者在简单互连或扩展互连中遇到桥接故障,扩展的ABM开关结构使得故障更容易探测。
By using a CPLD （ Complex Programmable Logic Device ） and discrete devices, the design of the IEEE 1149.4 mixed-signal boundary scan standard experimental test infrastructure was implemented in this paper. In order to augment the diagnostic capability of interconnect rest, some modifications have been applied to the ABM switching architecture. These modifications to the ABM cells that allow testers to compare analog input signals with multiple voltage levels. When the testers encounter a brigding fault in a simple interconnect or an extended interconnect, the extended ABM switching architecture makes it easily detectable.
出处
《电子测试》
2012年第5期1-6,共6页
Electronic Test
基金
北京市留学人员专项资金资助
