期刊文献+

多芯片焊球阵列封装体受热载荷作用数值模拟

Numerical Simulation of Multi-Chip Ball Grid Array Package Under Thermal Loading
在线阅读 下载PDF
导出
摘要 针对典型高密度多芯片BGA(焊球阵列)封装体建立三维有限元分析模型,研究不同尺寸封装体在稳态热载荷作用下的结构变形和应力情况,在此基础上引入包含等效梁和危险焊球真实几何形状和间距等在内的简化模型以进行序列分析,研究各设计参数对力学参量的影响。数值结果反映了封装体应力分布及其变化特点,表明影响封装体变形和应力的主要参数;提出的建模方法简便有效,可以方便地用来分析不同类型的BGA封装,并扩展应用至不同的分析目的,为此种结构的设计和优化提供一定参考。 Three dimensional parametric finite element analysis models were created for typical high density BGA(Ball Grid Array) package to analyze the structure deformation and stress when loading steady temperature upon packages with different sizes.A simplified model for series analysis including equivalent beam and critical solder ball was established to analyze the effect of design parameters upon the mechanical properties of the package.The numerical results reflected the stress distribution and varying traits of the package,main parameters affecting the deformation and stress were identified.The method developed is convenient and effective.Also it can be applied for analysis of different types of BGA,or can be used for different analysis purpose,and is of certain reference value for the design and optimization of such kind of packages.
出处 《国防科技大学学报》 EI CAS CSCD 北大核心 2010年第5期23-28,共6页 Journal of National University of Defense Technology
基金 国家863高技术资助项目(2007AA702503)
关键词 多芯片组件 焊球阵列封装体 参数化有限元模型 热载荷 热应力 multi-chip module ball grid array package parametric finite element model thermal loading thermal stress
  • 相关文献

参考文献14

  • 1邵宝东,孙兆伟,王丽凤,王直欢.陶瓷球栅阵列封装热致疲劳寿命分析[J].哈尔滨工业大学学报,2007,39(10):1625-1630. 被引量:3
  • 2葛增杰,顾元宪,王宏伟,靳永欣.电子封装件受热载荷作用有限元数值模拟分析[J].大连理工大学学报,2005,45(3):320-325. 被引量:14
  • 3许杨剑,刘勇,梁利华,余丹铭.芯片叠层球栅阵列尺寸封装的焊球疲劳寿命预测[J].浙江工业大学学报,2004,32(6):668-673. 被引量:8
  • 4Zhang X W,Wong E H,et al.Thermo-mechanical Finite Element Analysis in a Multichip Build up Substrate Based Package Design. Microelectronics Reliability . 2004
  • 5Zhang X W,Kripesh V,Chai T C,et al.Board Level Solder Joint Reliability Analysis of a Fine Pitch Cu Post Type Wafer Level Package(WLP). Microelectronics Reliability . 2008
  • 6Ren W,Wang J J.Shell-based Simplified Electronic Package Model Development and Its Application for Reliability Analysis. ElectronicsPackaging Technology Ccnference . 2003
  • 7Borgesen P,Li C Y.Analytical Estimates of Thermally Induced Stresses and Strains in Flip-chip Solder Joints. Proceedings of the joint ASME/JSME Advances in Electronic Packaging . 1992
  • 8Hossain M M,et,al.Design Optimization and Reliability of PWB Level Electronic Package. Journal of Electronic Defense . 2007
  • 9Chan Y S,Ricky Lee S W.Thermal Resistance Analysis of a Multi-stack Flip Chip 3-D Package. Electronic Components and TechnologyConference . 2006
  • 10Liu De-Shin,Ni Chin-Yu,Chen Ching-Yang.Integrated design method for flip chip CSP with electrical, thermal and thermo-mechanical qualifications. Finite Elements in Analysis and Design . 2003

二级参考文献22

  • 1夏林,赵刚,孙青林,王德会,赵英.板上芯片(COB)的热应力分析[J].天津理工学院学报,1995,11(1):63-70. 被引量:3
  • 2杜磊,孙承永,包军林.再流焊工艺中表面组装片式元件热应力模拟[J].西安电子科技大学学报,1995,22(3):307-316. 被引量:4
  • 3MILLER M R, MOHAMMED I, HO P S. Quantitative strain analysis of flip-chip electronic packages using phase-shifting moiré interferometry [J]. Optics and Lasers in Eng, 2001, 36:127-139.
  • 4WAKIL J A, HO P S. Simulating package behavior under power dissipation using uniform thermal loading [J]. IEEE Trans on Adv Packaging, 2001, 24(1):60-65.
  • 5MILLER M R, MOHAMMED I, HO P S. Quantitative strain analysis of flip-chip electronic packages using phase-shifting moiré interferometry [J]. Optics and Lasers in Eng, 2001, 36:127-139.
  • 6WAKIL J A, HO P S. Simulating package behavior under power dissipation using uniform thermal loading [J]. IEEE Trans on Adv Packaging, 2001, 24(1):60-65.
  • 7Pao Y H. A fracture mechanics approach to thermal fatigue life prediction of solder joints[J]. IEEECHMT, 1992, 15(4):559-570.
  • 8Yamada S E. A fracture mechanics approach to solder joint cracking[J]. IEEECHMT, 1989, 12(1): 99-104.
  • 9Wong B, Helling D D, Clark, R W. A creep-rupture model for two-phase eutectic solder[J]. IEEECHMT. 1988,11(3):284-290.
  • 10Darveaux R. Effect of simulation methodology on solder joint crack growth correlations[A]. Proceedings of 50th Electronic Components & Technology Conference[C], 2000. 1048-1058.

共引文献22

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部