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GPS接收机CMOS低噪声放大器设计

CMOS LNA Applied for GPS Receiver
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摘要 采用TSMC 0.18μm CMOS工艺设计了一个应用于GPS接收机的低噪声放大器电路。低噪声放大器电路包含两级放大器,前级为共源放大器,后级为共源共栅放大器。偏置电路采用镜像电流源结构,为放大管提供了电压偏置,使其工作在饱和区。在1.8V单电源电压供电下,采用ADS仿真得到的结果为:电路的静态电流7.6mA,静态功耗13.7mw,功率增益达到23dB,噪声系数约为1.5dB,输出1dB压缩点功率为9.8dBm,放大器电路的工作频率为1.2276GHz,能够稳定地工作。 A design for integrated narrowband low noise amplifier(LNA) applied in GPS receiver is presented,it is implemented in TSMC's 0.18μm CMOS technology.The design of LNA adopts two-staged structure;the first stage is common source while the second utilizes the cascade.A current mirror bias circuit is integrated to provide voltage bias to the amplifying transistor which makes the transistor operate in the saturate area.Results from the simulation under advanced design system(ADS) software shows that it operates at frequency of 1.2276GHz with a 13.7mw power consumption and a 23dB power gain,the noise figure is approximately 1.5dB and the output 1dB compression point is 9.8dBm.The circuit dissipates 7.6mA current from a single 1.8V power supply,the LNA can operate steadily.
作者 王向前
机构地区 平顶山学院
出处 《煤炭技术》 CAS 北大核心 2010年第11期235-236,共2页 Coal Technology
关键词 低噪声放大器 集成电路 功率增益 噪声系数 GPS low noise IC power gain noise figure
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