摘要
针对生物医学成像设备的高分辨率、高采样率、低功耗、抗噪声等要求,设计了一种64通道,高精度,具有自校准功能的时间数字转换(TDC)电路.双Gray码计数器实现10bit"粗"计数,基于延迟锁相环(DLL)阵列的多采样技术实现8bit"细"时间的精确测量.64个通道共用一个深度为32字的异步先进先出(FIFO)单元存储时间信息.采用SMIC0.18μm CMOS低压工艺实现电路.时间精度范围是71～143ps,动态范围是10～20μs,微分非线性误差DNL=0.8LSB,积分非线性误差INL=0.3LSB.该电路适用于生物医学成像,尤其是小动物PET成像系统.
Present a design of a 64-channel, high time resolution, self-calibrating Time to Digital Converter （TDC） for biomedical imaging, especially the small animal PET imaging applications. Double 10-bit gray counters are designed for coarse conversion while a multiphase sampling technology based on array of Delay Locked Loops （DLLs） is proposed for fine conversion. 64 channels use a asynchronous First In First Out unit to store the timing data commonly. Fabricated in SMIC 0.18μm CMOS low voltage technology. The simulations indicate the resolution range is achieved from 71 ps to 143 ps and the dynamic range is 10～20μs. The differential nonlinearity is 0.8 LSB. The integral nonlinearity is 0.3 LSB.
出处
《微电子学与计算机》
CSCD
北大核心
2010年第5期57-60,65,共5页
Microelectronics & Computer
