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60GHz 11dBm CMOS功率放大器设计 被引量:3

Design of a 60 GHz 11 dBm CMOS Power Amplifier
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摘要 近年来60 GHz附近的一个连续频段可以自由使用,这为短距离的无线个域网等高速率传输的应用提供了条件。设计了一个工作在60 GHz的CMOS功率放大器。采用台积电0.13μmRF-CMOS工艺设计制造,芯片面积为0.35mm×0.4 mm,最大线性输出功率为11 dBm,增益为9.7 dB,漏极增加效率(ηPAE)为9.1%。达到应用在通信距离为10 m的无线个域网(WPAN)射频电路中的要求。设计中采用了厚栅氧化层工艺器件和Load-Pull方法设计最优化输出阻抗Zopt,以提高输出功率。该方法能较大提高CMOS功率放大器的输出功率,可以应用到各种CMOS功率放大器设计中。 The unlicensed band around 60 GHz provides the opportunity for high-data-rate wireless communications such as WPAN. A CMOS power amplifier ηPAE was designed at 60 GHz. The PA delivers 11 dBm output power, the chip area is 0. 35 mm x 0.4 mm, maximum linear output power is 11 dB, gain is 9.7 dB, power added efficiency (ηPAE) is 9.1%. It meets the requests for RF circuits of 10 m WPAN systems. In order to meet the design goals, some special methods were used, including thick oxide technology, and output matching with load-pull theory. These methods also can be used to design different CMOS power amplifiers.
出处 《半导体技术》 CAS CSCD 北大核心 2009年第12期1231-1234,共4页 Semiconductor Technology
基金 国家973项目(2006CB032705)
关键词 功率放大器 射频 互补金属氧化物半导体 个域网 负载牵引 power amplifier RF CMOS WPAN(wireless personal area network) load-pull
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参考文献5

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同被引文献27

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