摘要
在集成电路中,全局互连线的设计是关键。分析了互连线RC和RLC模型的不同特性;针对互连线与CMOS器件级联的电路进行分析。分析了集成电路中互连线和CMOS的模型对性能的影响,并给出了基于HSPICE软件的仿真结果。仿真结果表明,不同互连线和CMOS模型对系统传输特性有一定影响。
In IC design the feature size continues to shrink, analysis of global interconnects is critical in design. This paper focuses on interconnect and CMOS models＇ effects on performance in high-speed IC. The differences between interconnects RC model and RLC model are analyzed. For circuits of CMOS inverter driven interconnects simulation is performed using HSPICE software. The simulation results show that the models of interconnect and CMOS have influences on transmission property of system.
出处
《信息技术》
2009年第7期50-52,57,共4页
Information Technology
基金
国家自然科学基金-创新研究群体科学基金(60521002)
关键词
高速集成电路
互连线
CMOS
模型
high-speed integrated circuits
interconnect
CMOS
model
