摘要
阐述了一种沿边缘方向进行图像插值的缩放算法,并提出了基于该算法的一种视频缩放器电路的设计方案。该算法首先对数字视频图像帧采用拉普拉斯算子进行边缘检测,根据视频图像的动态阈值判定边缘区域和方向,得到二值化的帧图像的边缘信息。最后在边缘区域内边缘方向进行相位映射后,进行平行四边形线性插值。该算法的实现电路采用VerilogHDL语言描述,并在基于FPGA的视频处理平台上进行了原型验证。验证结果表明,插值后的图像边界更加清晰,消除了大比例缩放时线性插值的锯齿现象。
An image scaling algorithm based on edge direction interpolation was proposed, and a video scalar architecture was designed. In the algorithm, a Laplace detection was performed to mark the edge information of a video frame. Then the edge regions and edge directions were identified by the dynamic threshold of frames, and the edge information of binarized frame image was obtained. After a phase mapping, a parallelogram linear interpolation was carried out along the edge directions in the edge regions. In the circuit design of this edge direction interpolation algorithm, Verilog HDL was used in hardware description and a FPGA Video Processing Testbeneh was used in prototype verification. The result indicates that proposed algorithm can eliminate the saw tooth of the linearly interpolated picture in large-scale, which looks much clear and nice.
出处
《吉林大学学报（工学版）》
EI
CAS
CSCD
北大核心
2009年第4期1119-1124,共6页
Journal of Jilin University:Engineering and Technology Edition
基金
教育部博士点新教师基金项目(200800561112)
天津市科技发展计划项目(08ZCGYGX00400
043184511)
关键词
信息处理技术
边缘检测
视频缩放器
动态阈值
平行四边形线性插值
information proeessing
edge detection
video scalar
dynamic threshold
parallelogram linear interpolation
