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基于CCD场输出模式下成像系统设计 被引量:2

Design of imaging system based on CCD in field readout mode
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摘要 采用SONY行间转移型面阵CCDICX415AL作为传感器件,设计了一种新型的CCD成像系统,成像系统采用CCD信号专用芯片CXA1310AQ进行信号处理。使输出信号满足模拟信号PAL/CCIR标准,可以采用电视机或者配有视频卡的计算机作为显示终端。在介绍CCDICX415AL的结构和特点的基础上,完成了时序电路和驱动电路的设计,CCD工作模式为场输出模式,可以理解为垂直方向的binning技术,并采用相关双采样(CDS)技术滤除了视频信号中的相关噪声,提高了系统的信噪比,整个系统采用现场可编辑门阵列作为核心器件,通过自上而下的模块设计。完成了CCD驱动时序,数据采集时序控制和视频信号简单处理。 A new imaging system is design by using an interline transfer CCD ICX415AL as sensor which is produced by SNOY corporation .and greatly improve the SNR of system . CCD imaging system uses special signal processing chip-CXA1310AQ making output signal to meet the standard of PAL/CCIR . so It can be used with TV and computer which has video card as a display terminal On the basis of introducing the structure and characteristics of CCD ICX415AL , The circuits of timing sequence and driver for sensor are design , CCD work in field readout mode which can be realize as binning-technology in vertical direction and the noises of video signal are filtered by Correlated Double Sampling (CDS) , the signal-to-noise ratio of system is enhanced . The system is take Field Programmable Gate Array (FPGA) as the key device . the CCD driving clock , Clock control of data Acquisition and Video signal process are accomplished by the module design method of from top to bottom .
出处 《微计算机信息》 2009年第16期151-152,155,共3页 Control & Automation
基金 国家863高技术计划资助项目(NO.863-2-5-1-13B)
关键词 行间转移CCD 驱动时序 相关双采样 FPGA interline transfer CCD driving clock Correlate Double Sample ( CDS ) Field Programmable Gate Array (FPGA)
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