摘要
采用专用指令密码处理器的设计方法,提出了一种基于超长指令字(VLIW)的并行可配置椭圆曲线密码(ECC)协处理器结构。该协处理器结构对点加、倍点并行调度算法进行了映射,功能单元微结构采用了可重构的设计思想。整个ECC协处理器具有高度灵活性与较高运算速度的特点。能支持域宽可伸缩的GF(p)与GF(2m)有限域上的可变参数Weierstrass曲线。实验结果表明,GF(p)域上192 bit的ECC点乘运算只需要0.32 ms,比其它同类芯片运算速度提高了1.1～3.5倍。
With the design methodology ofapplication specific instruction-set crypto-processor, parallel and reconfigurable coprocessor architecture of ECC is proposed based on VLIW processor techniques. The proposed parallel ECC point addition and doubling scheduling algorithms are mapped on this architecture. Based on the concept ofreconfignrable design, the micro-architectures of function modules are designed. The whole ECC coprocessor has the characteristics of high flexibility and high processing speed. It can support scalable and parameterized Weierstrass curves over GF（p） and GF（2^m）. The experimental result shows that the time to process a ECC point multiplication over 192bit-GF（p） is only 0.32 ms, which is 1.1-3.5 times faster than other similar ECC chips.
出处
《计算机工程与设计》
CSCD
北大核心
2009年第2期310-313,共4页
Computer Engineering and Design
基金
"十一五"国防预研基金项目(405010202)
