摘要
通过分析带隙电压基准源的PSR,发现运放的PSR为1时,基准电压将具有很高的PSR。基于该思想,在带隙电压基准源中引入PSR提高电路,实现一种低功耗、低温度系数、高电源抑制能力的带隙电压基准源。该带隙电压基准源采用TSMC0.6μm、两层POLY、两层金属的CMOS工艺实现,芯片面积为0.0528mm2。测试结果表明:其最大工作电流为9μA;在2~5V工作电压下温度系数为15×10-6/℃;线调整率为50μV/V;100kHz的PSR为-70dB。仿真与测试结果验证了该方法的有效性。
The power supply rejection(PSR) of bandgap voltage reference was analyzed in this paper. If the PSR of op amp was 1, a high PSR bandgap voltage reference was realized, an improved, circuit with a low power, low temperature coefficient, high PSR bandgap Voltage reference was presenteel. The PSR was Implemented in TSMC 0. 6 μm, double poly layers, double metal layers CMOS techudogical process, the die size is 0. 052 8 mm^2. The maximum supply current is 9 μA. The temperature coefficient is 15× 10^-6/℃ at 2-5 V supply voltage. The line regulation is 50μ V/V. The power supply rejection at 100 kHz was --70 clB. The results of the simulation and silicon measurement confirmed this method validity.
出处
《电子器件》
CAS
2008年第5期1490-1494,共5页
Chinese Journal of Electron Devices