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CMOS电路中系统级低功耗设计研究 被引量:3

The Study of System-Level Low Power Consumption Design in CMOS Circuit
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摘要 首先对SOC的概念和降低功耗的重要性做了简单介绍;接着阐述了CMOS电路的功耗来源和集成电路低功耗设计的基本方法.重点讨论了系统级低功耗设计的思想路线和具体方法.给出了并行技术、流水线技术和异步电路结构等技术方法.明确指出了降低集成电路功耗的根本所在,使之集成电路的低功耗设计成为有的放矢. The concept of system - on - chip (SOC) and the importance of reducing power consumption are introduced simply, and then, the origin of power consumption in the CMOS circuit and the basic design method of low power consumption are clarified. The road map and specific design method of low power consumption are focused on. The technology method such as: parallel technology, pipeline technology and asynchronous circuits are given. The fundamental point of reducing the power consumption is clearly pointed out so that the low power consumption design is targeted.
作者 田朋 尹光
出处 《辽宁大学学报(自然科学版)》 CAS 2008年第2期125-128,共4页 Journal of Liaoning University:Natural Sciences Edition
基金 沈阳市科技局科研项目(1032029-2-06)
关键词 SOC 低功耗 JC设计 systemon chip low power IC design.
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参考文献3

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二级参考文献3

  • 1[1]Benini L,De Micheli G,Macii E,et al. Asymptotic zero-transition activity encoding for address buses in low-power microprocessor-based systems [A]. IEEE 7th Symp VLSI [C]. Urbanna,IL, 1997.77-82.
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